forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/media/platform/rockchip/isp/capture_v30.c
....@@ -332,7 +332,7 @@
332332 	if (dcrop->width == input_win->width &&
333333 	    dcrop->height == input_win->height &&
334334 	    dcrop->left == 0 && dcrop->top == 0 &&
335
-	    !dev->hw_dev->is_unite) {
335
+	    !dev->hw_dev->unite) {
336336 		rkisp_disable_dcrop(stream, async);
337337 		v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
338338 			 "stream %d crop disabled\n", stream->id);
....@@ -472,7 +472,7 @@
472472 {
473473 	struct rkisp_device *dev = stream->ispdev;
474474 	struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
475
-	bool is_unite = dev->hw_dev->is_unite;
475
+	bool is_unite = !!dev->hw_dev->unite;
476476 	u32 val, mask;
477477 
478478        /*
....@@ -480,26 +480,26 @@
480480 	* memory plane formats, so calculate the size explicitly.
481481 	*/
482482 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
483
-	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
483
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
484484 
485485 	val = out_fmt->plane_fmt[1].sizeimage;
486
-	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
486
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
487487 
488488 	val = out_fmt->plane_fmt[2].sizeimage;
489
-	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
489
+	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
490490 
491491 	val = is_unite ? out_fmt->width / 2 : out_fmt->width;
492
-	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_WIDTH, val, false, is_unite);
492
+	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_WIDTH, val, false);
493493 
494494 	val = out_fmt->height;
495
-	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_HEIGHT, val, false, is_unite);
495
+	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_HEIGHT, val, false);
496496 
497497 	val = out_fmt->plane_fmt[0].bytesperline;
498
-	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false, is_unite);
498
+	rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
499499 
500500 	val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_MP_UV_SWAP : 0;
501501 	mask = ISP3X_MI_XTD_FORMAT_MP_UV_SWAP;
502
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false, is_unite);
502
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
503503 
504504 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MP_YUV_MODE;
505505 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
....@@ -511,13 +511,13 @@
511511 		val |= ISP3X_SEPERATE_YUV_CFG;
512512 	else
513513 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_MP_YUV_MODE;
514
-	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
514
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
515515 
516516 	val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
517517 		CIF_MI_CTRL_INIT_OFFSET_EN | CIF_MI_MP_AUTOUPDATE_ENABLE |
518518 		stream->out_isp_fmt.write_format;
519519 	mask = GENMASK(19, 16) | MI_CTRL_MP_FMT_MASK;
520
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false, is_unite);
520
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
521521 
522522 	mi_frame_end_int_enable(stream);
523523 	/* set up first buffer */
....@@ -558,7 +558,7 @@
558558 	struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
559559 	struct ispsd_out_fmt *input_isp_fmt =
560560 			rkisp_get_ispsd_out_fmt(&dev->isp_sdev);
561
-	bool is_unite = dev->hw_dev->is_unite;
561
+	bool is_unite = !!dev->hw_dev->unite;
562562 	u32 sp_in_fmt, val, mask;
563563 
564564 	if (mbus_code_sp_in_fmt(input_isp_fmt->mbus_code,
....@@ -572,26 +572,26 @@
572572 	* memory plane formats, so calculate the size explicitly.
573573 	*/
574574 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
575
-	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
575
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
576576 
577577 	val = out_fmt->plane_fmt[1].sizeimage;
578
-	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
578
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
579579 
580580 	val = out_fmt->plane_fmt[2].sizeimage;
581
-	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
581
+	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
582582 
583583 	val = is_unite ? out_fmt->width / 2 : out_fmt->width;
584
-	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_WIDTH, val, false, is_unite);
584
+	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_WIDTH, val, false);
585585 
586586 	val = out_fmt->height;
587
-	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_HEIGHT, val, false, is_unite);
587
+	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_HEIGHT, val, false);
588588 
589589 	val = stream->u.sp.y_stride;
590
-	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false, is_unite);
590
+	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false);
591591 
592592 	val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_SP_UV_SWAP : 0;
593593 	mask = ISP3X_MI_XTD_FORMAT_SP_UV_SWAP;
594
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false, is_unite);
594
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
595595 
596596 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_SP_YUV_MODE;
597597 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
....@@ -603,14 +603,14 @@
603603 		val |= ISP3X_SEPERATE_YUV_CFG;
604604 	else
605605 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_SP_YUV_MODE;
606
-	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
606
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
607607 
608608 	val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
609609 		CIF_MI_CTRL_INIT_OFFSET_EN | stream->out_isp_fmt.write_format |
610610 		sp_in_fmt | stream->out_isp_fmt.output_format |
611611 		CIF_MI_SP_AUTOUPDATE_ENABLE;
612612 	mask = GENMASK(19, 16) | MI_CTRL_SP_FMT_MASK;
613
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false, is_unite);
613
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
614614 
615615 	mi_frame_end_int_enable(stream);
616616 	/* set up first buffer */
....@@ -625,12 +625,12 @@
625625 	u32 h = ALIGN(stream->out_fmt.height, 16);
626626 	u32 w = ALIGN(stream->out_fmt.width, 16);
627627 	u32 offs = ALIGN(w * h / 16, RK_MPP_ALIGN);
628
-	bool is_unite = stream->ispdev->hw_dev->is_unite;
628
+	bool is_unite = !!stream->ispdev->hw_dev->unite;
629629 
630630 	rkisp_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET, offs, false);
631
-	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_WIDTH, w, false, is_unite);
632
-	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_PAYL_WIDTH, w, false, is_unite);
633
-	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_HEIGHT, h, false, is_unite);
631
+	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_WIDTH, w, false);
632
+	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_PAYL_WIDTH, w, false);
633
+	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_HEIGHT, h, false);
634634 	if (is_unite) {
635635 		u32 left_w = (stream->out_fmt.width / 2) & ~0xf;
636636 
....@@ -638,8 +638,7 @@
638638 		rkisp_next_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET, offs, false);
639639 	}
640640 	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, 0,
641
-			     CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN,
642
-			     false, is_unite);
641
+			     CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN, false);
643642 	mi_frame_end_int_enable(stream);
644643 	/* set up first buffer */
645644 	mi_frame_end(stream, FRAME_INIT);
....@@ -650,7 +649,7 @@
650649 {
651650 	struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
652651 	struct rkisp_device *dev = stream->ispdev;
653
-	bool is_unite = dev->hw_dev->is_unite;
652
+	bool is_unite = dev->hw_dev->unite;
654653 	u32 val, mask;
655654 
656655        /*
....@@ -658,19 +657,19 @@
658657 	* memory plane formats, so calculate the size explicitly.
659658 	*/
660659 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
661
-	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
660
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
662661 
663662 	val = out_fmt->plane_fmt[1].sizeimage;
664
-	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
663
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
665664 
666665 	val = is_unite ? out_fmt->width / 2 : out_fmt->width;
667
-	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_WIDTH, val, false, is_unite);
666
+	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_WIDTH, val, false);
668667 
669668 	val = out_fmt->height;
670
-	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_HEIGHT, val, false, is_unite);
669
+	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_HEIGHT, val, false);
671670 
672671 	val = out_fmt->plane_fmt[0].bytesperline;
673
-	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false, is_unite);
672
+	rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
674673 
675674 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_BP_YUV_MODE;
676675 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
....@@ -680,9 +679,9 @@
680679 		val |= ISP3X_SEPERATE_YUV_CFG;
681680 	else
682681 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_BP_YUV_MODE;
683
-	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
682
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
684683 	val = CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN;
685
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false, is_unite);
684
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
686685 	mi_frame_end_int_enable(stream);
687686 	/* set up first buffer */
688687 	mi_frame_end(stream, FRAME_INIT);
....@@ -697,8 +696,7 @@
697696 
698697 	if (isp_fmt->fmt_type == FMT_BAYER)
699698 		val = CIF_MI_CTRL_RAW_ENABLE;
700
-	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val,
701
-			     false, stream->ispdev->hw_dev->is_unite);
699
+	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
702700 }
703701 
704702 static void sp_enable_mi(struct rkisp_stream *stream)
....@@ -711,21 +709,18 @@
711709 	if (fmt->fmt_type == FMT_RGB &&
712710 	    dev->isp_sdev.quantization == V4L2_QUANTIZATION_FULL_RANGE)
713711 		val |= mask;
714
-	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL,
715
-			     mask, val, false,
716
-			     stream->ispdev->hw_dev->is_unite);
712
+	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
717713 }
718714 
719715 static void fbc_enable_mi(struct rkisp_stream *stream)
720716 {
721717 	u32 val, mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_YUV_MASK |
722718 			ISP3X_MPFBC_SPARSE_MODE;
723
-	bool is_unite = stream->ispdev->hw_dev->is_unite;
724719 
725720 	/* config no effect immediately, read back is shadow, get config value from cache */
726721 	val = rkisp_read_reg_cache(stream->ispdev, ISP3X_MPFBC_CTRL) & ~mask;
727722 	val |= stream->out_isp_fmt.write_format | ISP3X_HEAD_OFFSET_EN | ISP3X_MPFBC_EN;
728
-	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_CTRL, val, false, is_unite);
723
+	rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_CTRL, val, false);
729724 }
730725 
731726 static void bp_enable_mi(struct rkisp_stream *stream)
....@@ -733,36 +728,31 @@
733728 	u32 val = stream->out_isp_fmt.write_format |
734729 		ISP3X_BP_ENABLE | ISP3X_BP_AUTO_UPD;
735730 
736
-	rkisp_unite_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false,
737
-			  stream->ispdev->hw_dev->is_unite);
731
+	rkisp_unite_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false);
738732 }
739733 
740734 static void mp_disable_mi(struct rkisp_stream *stream)
741735 {
742736 	u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE;
743737 
744
-	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false,
745
-			       stream->ispdev->hw_dev->is_unite);
738
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false);
746739 }
747740 
748741 static void sp_disable_mi(struct rkisp_stream *stream)
749742 {
750
-	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE,
751
-			       false, stream->ispdev->hw_dev->is_unite);
743
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE, false);
752744 }
753745 
754746 static void fbc_disable_mi(struct rkisp_stream *stream)
755747 {
756748 	u32 mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_EN;
757749 
758
-	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MPFBC_CTRL, mask,
759
-			       false, stream->ispdev->hw_dev->is_unite);
750
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MPFBC_CTRL, mask, false);
760751 }
761752 
762753 static void bp_disable_mi(struct rkisp_stream *stream)
763754 {
764
-	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE,
765
-			       false, stream->ispdev->hw_dev->is_unite);
755
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE, false);
766756 }
767757 
768758 static void update_mi(struct rkisp_stream *stream)
....@@ -786,24 +776,25 @@
786776 			rkisp_write(dev, reg, val, false);
787777 		}
788778 
789
-		if (dev->hw_dev->is_unite) {
779
+		if (dev->hw_dev->unite) {
790780 			u32 mult = stream->id != RKISP_STREAM_FBC ? 1 :
791781 				   (stream->out_isp_fmt.write_format ? 32 : 24);
782
+			u32 div = stream->out_isp_fmt.fourcc == V4L2_PIX_FMT_UYVY ? 1 : 2;
792783 
793784 			reg = stream->config->mi.y_base_ad_init;
794785 			val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
795
-			val += ((stream->out_fmt.width / 2) & ~0xf);
786
+			val += ((stream->out_fmt.width / div) & ~0xf);
796787 			rkisp_next_write(dev, reg, val, false);
797788 
798789 			reg = stream->config->mi.cb_base_ad_init;
799790 			val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
800
-			val += ((stream->out_fmt.width / 2) & ~0xf) * mult;
791
+			val += ((stream->out_fmt.width / div) & ~0xf) * mult;
801792 			rkisp_next_write(dev, reg, val, false);
802793 
803794 			if (stream->id != RKISP_STREAM_FBC && stream->id != RKISP_STREAM_BP) {
804795 				reg = stream->config->mi.cr_base_ad_init;
805796 				val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
806
-				val += ((stream->out_fmt.width / 2) & ~0xf);
797
+				val += ((stream->out_fmt.width / div) & ~0xf);
807798 				rkisp_next_write(dev, reg, val, false);
808799 			}
809800 		}
....@@ -817,22 +808,22 @@
817808 		stream->dbg.frameloss++;
818809 		val = dummy_buf->dma_addr;
819810 		reg = stream->config->mi.y_base_ad_init;
820
-		rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
811
+		rkisp_unite_write(dev, reg, val, false);
821812 		reg = stream->config->mi.cb_base_ad_init;
822
-		rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
813
+		rkisp_unite_write(dev, reg, val, false);
823814 		reg = stream->config->mi.cr_base_ad_init;
824815 		if (stream->id != RKISP_STREAM_FBC && stream->id != RKISP_STREAM_BP)
825
-			rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
816
+			rkisp_unite_write(dev, reg, val, false);
826817 	}
827818 
828819 	if (stream->id != RKISP_STREAM_FBC) {
829820 		reg = stream->config->mi.y_offs_cnt_init;
830
-		rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
821
+		rkisp_unite_write(dev, reg, 0, false);
831822 		reg = stream->config->mi.cb_offs_cnt_init;
832
-		rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
823
+		rkisp_unite_write(dev, reg, 0, false);
833824 		reg = stream->config->mi.cr_offs_cnt_init;
834825 		if (stream->id != RKISP_STREAM_BP)
835
-			rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
826
+			rkisp_unite_write(dev, reg, 0, false);
836827 	}
837828 
838829 	v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
....@@ -841,7 +832,7 @@
841832 		 rkisp_read(dev, stream->config->mi.y_base_ad_init, false),
842833 		 rkisp_read(dev, stream->config->mi.cb_base_ad_init, false),
843834 		 rkisp_read(dev, stream->config->mi.y_base_ad_shd, true));
844
-	if (dev->hw_dev->is_unite)
835
+	if (dev->hw_dev->unite)
845836 		v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
846837 			 "%s stream:%d Y:0x%x CB:0x%x | Y_SHD:0x%x, right\n",
847838 			 __func__, stream->id,
....@@ -896,11 +887,10 @@
896887 {
897888 	struct rkisp_device *dev = stream->ispdev;
898889 	u32 val, mask = ISP3X_MPSELF_UPD | ISP3X_SPSELF_UPD | ISP3X_BPSELF_UPD;
899
-	bool is_unite = dev->hw_dev->is_unite;
900890 
901891 	if (stream->id == RKISP_STREAM_FBC) {
902892 		val = ISP3X_MPFBC_FORCE_UPD;
903
-		rkisp_unite_set_bits(dev, ISP3X_MPFBC_CTRL, 0, val, false, is_unite);
893
+		rkisp_unite_set_bits(dev, ISP3X_MPFBC_CTRL, 0, val, false);
904894 		return;
905895 	}
906896 
....@@ -918,7 +908,7 @@
918908 		return;
919909 	}
920910 
921
-	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL2, mask, val, false, is_unite);
911
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL2, mask, val, false);
922912 }
923913 
924914 static int mi_frame_start(struct rkisp_stream *stream, u32 mis)
....@@ -976,13 +966,25 @@
976966 		    (stream->frame_early && state == FRAME_IRQ))
977967 			goto end;
978968 	} else {
969
+		spin_lock_irqsave(&stream->vbq_lock, lock_flags);
979970 		buf = stream->curr_buf;
971
+		stream->curr_buf = NULL;
972
+		spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
980973 	}
981974 
982975 	if (buf) {
983976 		struct rkisp_stream *vir = &dev->cap_dev.stream[RKISP_STREAM_VIR];
984977 		struct vb2_buffer *vb2_buf = &buf->vb.vb2_buf;
985978 		u64 ns = 0;
979
+
980
+		if (stream->skip_frame) {
981
+			spin_lock_irqsave(&stream->vbq_lock, lock_flags);
982
+			list_add_tail(&buf->queue, &stream->buf_queue);
983
+			spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
984
+			if (stream->skip_frame)
985
+				stream->skip_frame--;
986
+			goto end;
987
+		}
986988 
987989 		/* Dequeue a filled buffer */
988990 		for (i = 0; i < isp_fmt->mplanes; i++) {
....@@ -994,10 +996,10 @@
994996 		rkisp_dmarx_get_frame(dev, &i, NULL, &ns, true);
995997 		buf->vb.sequence = i;
996998 		if (!ns)
997
-			ns = ktime_get_ns();
999
+			ns = rkisp_time_get_ns(dev);
9981000 		vb2_buf->timestamp = ns;
9991001 
1000
-		ns = ktime_get_ns();
1002
+		ns = rkisp_time_get_ns(dev);
10011003 		stream->dbg.interval = ns - stream->dbg.timestamp;
10021004 		stream->dbg.timestamp = ns;
10031005 		stream->dbg.id = buf->vb.sequence;
....@@ -1104,7 +1106,7 @@
11041106 
11051107 	stream->ops->enable_mi(stream);
11061108 	stream->streaming = true;
1107
-
1109
+	stream->skip_frame = 0;
11081110 	return 0;
11091111 }
11101112 
....@@ -1686,7 +1688,7 @@
16861688 	struct rkisp_stream *stream;
16871689 	unsigned int i;
16881690 
1689
-	if (dev->hw_dev->is_unite) {
1691
+	if (dev->hw_dev->unite) {
16901692 		u32 val = rkisp_read(dev, ISP3X_MI_RIS, true);
16911693 
16921694 		if (val) {