forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/drivers/media/platform/rockchip/cif/hw.h
....@@ -18,11 +18,14 @@
1818 #include <linux/rk-camera-module.h>
1919 #include "regs.h"
2020 #include "version.h"
21
+#include "dev.h"
2122
22
-#define RKCIF_DEV_MAX 2
23
+#define RKCIF_DEV_MAX 7
2324 #define RKCIF_HW_DRIVER_NAME "rkcifhw"
24
-#define RKCIF_MAX_BUS_CLK 8
25
+#define RKCIF_MAX_BUS_CLK 15
2526 #define RKCIF_MAX_RESET 15
27
+
28
+#define RKCIF_MAX_GROUP 4
2629
2730 #define write_cif_reg(base, addr, val) \
2831 writel(val, (addr) + (base))
....@@ -32,6 +35,58 @@
3235 writel(readl((addr) + (base)) | (val), (addr) + (base))
3336 #define write_cif_reg_and(base, addr, val) \
3437 writel(readl((addr) + (base)) & (val), (addr) + (base))
38
+
39
+/*
40
+ * multi sensor sync mode
41
+ * RKCIF_NOSYNC_MODE: not used sync mode
42
+ * RKCIF_MASTER_MASTER: internal master->external master
43
+ * RKCIF_MASTER_SLAVE: internal master->slave
44
+ * RKCIF_MASTER_MASTER: pwm/gpio->external master
45
+ * RKCIF_MASTER_MASTER: pwm/gpio->slave
46
+ */
47
+enum rkcif_sync_mode {
48
+ RKCIF_NOSYNC_MODE,
49
+ RKCIF_MASTER_MASTER,
50
+ RKCIF_MASTER_SLAVE,
51
+ RKCIF_EXT_MASTER,
52
+ RKCIF_EXT_SLAVE,
53
+};
54
+
55
+struct rkcif_sync_dev {
56
+ struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
57
+ int count;
58
+ bool is_streaming[RKCIF_DEV_MAX];
59
+};
60
+
61
+struct rkcif_multi_sync_config {
62
+ struct rkcif_sync_dev int_master;
63
+ struct rkcif_sync_dev ext_master;
64
+ struct rkcif_sync_dev slave;
65
+ enum rkcif_sync_mode mode;
66
+ int dev_cnt;
67
+ int streaming_cnt;
68
+ u32 sync_code;
69
+ u32 sync_mask;
70
+ u32 update_code;
71
+ u32 update_cache;
72
+ u32 frame_idx;
73
+ bool is_attach;
74
+};
75
+
76
+struct rkcif_dummy_buffer {
77
+ struct list_head list;
78
+ struct dma_buf *dbuf;
79
+ dma_addr_t dma_addr;
80
+ struct page **pages;
81
+ void *mem_priv;
82
+ void *vaddr;
83
+ u32 size;
84
+ int dma_fd;
85
+ bool is_need_vaddr;
86
+ bool is_need_dbuf;
87
+ bool is_need_dmafd;
88
+ bool is_free;
89
+};
3590
3691 /*
3792 * add new chip id in tail in time order
....@@ -47,6 +102,9 @@
47102 CHIP_RV1126_CIF,
48103 CHIP_RV1126_CIF_LITE,
49104 CHIP_RK3568_CIF,
105
+ CHIP_RK3588_CIF,
106
+ CHIP_RV1106_CIF,
107
+ CHIP_RK3562_CIF,
50108 };
51109
52110 struct rkcif_hw_match_data {
....@@ -56,35 +114,6 @@
56114 int clks_num;
57115 int rsts_num;
58116 const struct cif_reg *cif_regs;
59
-};
60
-
61
-/*
62
- * the detecting mode of cif reset timer
63
- * related with dts property:rockchip,cif-monitor
64
- */
65
-enum rkcif_monitor_mode {
66
- RKCIF_MONITOR_MODE_IDLE = 0x0,
67
- RKCIF_MONITOR_MODE_CONTINUE,
68
- RKCIF_MONITOR_MODE_TRIGGER,
69
- RKCIF_MONITOR_MODE_HOTPLUG,
70
-};
71
-
72
-struct rkcif_hw_timer {
73
- struct timer_list timer;
74
- spinlock_t timer_lock;
75
- unsigned long cycle_jif;
76
- /* unit: us */
77
- unsigned int run_cnt;
78
- unsigned int max_run_cnt;
79
- unsigned int stop_index_of_run_cnt;
80
- unsigned int monitor_cycle;
81
- unsigned int err_ref_cnt;
82
- unsigned int err_time_interval;
83
- unsigned int is_reset_by_user;
84
- bool is_running;
85
- bool has_been_init;
86
- enum rkcif_monitor_mode monitor_mode;
87
- enum rkmodule_reset_src reset_src;
88117 };
89118
90119 /*
....@@ -101,25 +130,32 @@
101130 struct regmap *grf;
102131 struct clk *clks[RKCIF_MAX_BUS_CLK];
103132 int clk_size;
104
- bool iommu_en;
105133 struct iommu_domain *domain;
106134 struct reset_control *cif_rst[RKCIF_MAX_RESET];
107135 int chip_id;
108136 const struct cif_reg *cif_regs;
109
- bool can_be_reset;
110
-
111
- struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
112
- int dev_num;
113
-
114
- atomic_t power_cnt;
137
+ const struct vb2_mem_ops *mem_ops;
138
+ struct rkcif_device *cif_dev[RKCIF_DEV_MAX];
139
+ int dev_num;
140
+ atomic_t power_cnt;
115141 const struct rkcif_hw_match_data *match_data;
116142 struct mutex dev_lock;
117
- struct rkcif_hw_timer hw_timer;
118
- struct rkcif_reset_info reset_info;
143
+ struct rkcif_multi_sync_config sync_config[RKCIF_MAX_GROUP];
144
+ spinlock_t group_lock;
145
+ struct notifier_block reset_notifier; /* reset for mipi csi crc err */
146
+ struct rkcif_dummy_buffer dummy_buf;
147
+ bool iommu_en;
148
+ bool can_be_reset;
149
+ bool is_dma_sg_ops;
150
+ bool is_dma_contig;
151
+ bool adapt_to_usbcamerahal;
152
+ u64 irq_time;
153
+ bool is_rk3588s2;
119154 };
120155
121156 void rkcif_hw_soft_reset(struct rkcif_hw *cif_hw, bool is_rst_iommu);
122157 void rkcif_disable_sys_clk(struct rkcif_hw *cif_hw);
123158 int rkcif_enable_sys_clk(struct rkcif_hw *cif_hw);
159
+int rk_cif_plat_drv_init(void);
124160
125161 #endif