| .. | .. |
|---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * Copyright (c) 2016 MediaTek Inc. |
|---|
| 3 | 4 | * Author: PC Chen <pc.chen@mediatek.com> |
|---|
| 4 | 5 | * Tiffany Lin <tiffany.lin@mediatek.com> |
|---|
| 5 | | -* |
|---|
| 6 | | -* This program is free software; you can redistribute it and/or modify |
|---|
| 7 | | -* it under the terms of the GNU General Public License version 2 as |
|---|
| 8 | | -* published by the Free Software Foundation. |
|---|
| 9 | | -* |
|---|
| 10 | | -* This program is distributed in the hope that it will be useful, |
|---|
| 11 | | -* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|---|
| 12 | | -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|---|
| 13 | | -* GNU General Public License for more details. |
|---|
| 14 | 6 | */ |
|---|
| 15 | 7 | |
|---|
| 16 | 8 | #ifndef _MTK_VCODEC_DRV_H_ |
|---|
| .. | .. |
|---|
| 107 | 99 | u32 fourcc; |
|---|
| 108 | 100 | enum mtk_fmt_type type; |
|---|
| 109 | 101 | u32 num_planes; |
|---|
| 102 | + u32 flags; |
|---|
| 110 | 103 | }; |
|---|
| 111 | 104 | |
|---|
| 112 | 105 | /** |
|---|
| .. | .. |
|---|
| 137 | 130 | enum v4l2_field field; |
|---|
| 138 | 131 | unsigned int bytesperline[MTK_VCODEC_MAX_PLANES]; |
|---|
| 139 | 132 | unsigned int sizeimage[MTK_VCODEC_MAX_PLANES]; |
|---|
| 140 | | - struct mtk_video_fmt *fmt; |
|---|
| 133 | + const struct mtk_video_fmt *fmt; |
|---|
| 141 | 134 | }; |
|---|
| 142 | 135 | |
|---|
| 143 | 136 | /** |
|---|
| .. | .. |
|---|
| 151 | 144 | * @intra_period: I frame period |
|---|
| 152 | 145 | * @gop_size: group of picture size, it's used as the intra frame period |
|---|
| 153 | 146 | * @framerate_num: frame rate numerator. ex: framerate_num=30 and |
|---|
| 154 | | - * framerate_denom=1 menas FPS is 30 |
|---|
| 147 | + * framerate_denom=1 means FPS is 30 |
|---|
| 155 | 148 | * @framerate_denom: frame rate denominator. ex: framerate_num=30 and |
|---|
| 156 | | - * framerate_denom=1 menas FPS is 30 |
|---|
| 149 | + * framerate_denom=1 means FPS is 30 |
|---|
| 157 | 150 | * @h264_max_qp: Max value for H.264 quantization parameter |
|---|
| 158 | 151 | * @h264_profile: V4L2 defined H.264 profile |
|---|
| 159 | 152 | * @h264_level: V4L2 defined H.264 level |
|---|
| .. | .. |
|---|
| 176 | 169 | }; |
|---|
| 177 | 170 | |
|---|
| 178 | 171 | /** |
|---|
| 172 | + * struct mtk_vcodec_clk_info - Structure used to store clock name |
|---|
| 173 | + */ |
|---|
| 174 | +struct mtk_vcodec_clk_info { |
|---|
| 175 | + const char *clk_name; |
|---|
| 176 | + struct clk *vcodec_clk; |
|---|
| 177 | +}; |
|---|
| 178 | + |
|---|
| 179 | +/** |
|---|
| 180 | + * struct mtk_vcodec_clk - Structure used to store vcodec clock information |
|---|
| 181 | + */ |
|---|
| 182 | +struct mtk_vcodec_clk { |
|---|
| 183 | + struct mtk_vcodec_clk_info *clk_info; |
|---|
| 184 | + int clk_num; |
|---|
| 185 | +}; |
|---|
| 186 | + |
|---|
| 187 | +/** |
|---|
| 179 | 188 | * struct mtk_vcodec_pm - Power management data structure |
|---|
| 180 | 189 | */ |
|---|
| 181 | 190 | struct mtk_vcodec_pm { |
|---|
| 182 | | - struct clk *vdec_bus_clk_src; |
|---|
| 183 | | - struct clk *vencpll; |
|---|
| 184 | | - |
|---|
| 185 | | - struct clk *vcodecpll; |
|---|
| 186 | | - struct clk *univpll_d2; |
|---|
| 187 | | - struct clk *clk_cci400_sel; |
|---|
| 188 | | - struct clk *vdecpll; |
|---|
| 189 | | - struct clk *vdec_sel; |
|---|
| 190 | | - struct clk *vencpll_d2; |
|---|
| 191 | | - struct clk *venc_sel; |
|---|
| 192 | | - struct clk *univpll1_d2; |
|---|
| 193 | | - struct clk *venc_lt_sel; |
|---|
| 191 | + struct mtk_vcodec_clk vdec_clk; |
|---|
| 194 | 192 | struct device *larbvdec; |
|---|
| 193 | + |
|---|
| 194 | + struct mtk_vcodec_clk venc_clk; |
|---|
| 195 | 195 | struct device *larbvenc; |
|---|
| 196 | 196 | struct device *larbvenclt; |
|---|
| 197 | 197 | struct device *dev; |
|---|
| .. | .. |
|---|
| 204 | 204 | * @pic_h: picture height |
|---|
| 205 | 205 | * @buf_w: picture buffer width (64 aligned up from pic_w) |
|---|
| 206 | 206 | * @buf_h: picture buffer heiht (64 aligned up from pic_h) |
|---|
| 207 | | - * @y_bs_sz: Y bitstream size |
|---|
| 208 | | - * @c_bs_sz: CbCr bitstream size |
|---|
| 209 | | - * @y_len_sz: additional size required to store decompress information for y |
|---|
| 210 | | - * plane |
|---|
| 211 | | - * @c_len_sz: additional size required to store decompress information for cbcr |
|---|
| 212 | | - * plane |
|---|
| 207 | + * @fb_sz: bitstream size of each plane |
|---|
| 213 | 208 | * E.g. suppose picture size is 176x144, |
|---|
| 214 | 209 | * buffer size will be aligned to 176x160. |
|---|
| 210 | + * @cap_fourcc: fourcc number(may changed when resolution change) |
|---|
| 211 | + * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os. |
|---|
| 215 | 212 | */ |
|---|
| 216 | 213 | struct vdec_pic_info { |
|---|
| 217 | 214 | unsigned int pic_w; |
|---|
| 218 | 215 | unsigned int pic_h; |
|---|
| 219 | 216 | unsigned int buf_w; |
|---|
| 220 | 217 | unsigned int buf_h; |
|---|
| 221 | | - unsigned int y_bs_sz; |
|---|
| 222 | | - unsigned int c_bs_sz; |
|---|
| 223 | | - unsigned int y_len_sz; |
|---|
| 224 | | - unsigned int c_len_sz; |
|---|
| 218 | + unsigned int fb_sz[VIDEO_MAX_PLANES]; |
|---|
| 219 | + unsigned int cap_fourcc; |
|---|
| 220 | + unsigned int reserved; |
|---|
| 225 | 221 | }; |
|---|
| 226 | 222 | |
|---|
| 227 | 223 | /** |
|---|
| .. | .. |
|---|
| 278 | 274 | |
|---|
| 279 | 275 | const struct vdec_common_if *dec_if; |
|---|
| 280 | 276 | const struct venc_common_if *enc_if; |
|---|
| 281 | | - unsigned long drv_handle; |
|---|
| 277 | + void *drv_handle; |
|---|
| 282 | 278 | |
|---|
| 283 | 279 | struct vdec_pic_info picinfo; |
|---|
| 284 | 280 | int dpb_size; |
|---|
| .. | .. |
|---|
| 304 | 300 | |
|---|
| 305 | 301 | }; |
|---|
| 306 | 302 | |
|---|
| 303 | +enum mtk_chip { |
|---|
| 304 | + MTK_MT8173, |
|---|
| 305 | + MTK_MT8183, |
|---|
| 306 | +}; |
|---|
| 307 | + |
|---|
| 308 | +/** |
|---|
| 309 | + * struct mtk_vcodec_enc_pdata - compatible data for each IC |
|---|
| 310 | + * |
|---|
| 311 | + * @chip: chip this encoder is compatible with |
|---|
| 312 | + * |
|---|
| 313 | + * @uses_ext: whether the encoder uses the extended firmware messaging format |
|---|
| 314 | + * @has_lt_irq: whether the encoder uses the LT irq |
|---|
| 315 | + * @min_birate: minimum supported encoding bitrate |
|---|
| 316 | + * @max_bitrate: maximum supported encoding bitrate |
|---|
| 317 | + * @capture_formats: array of supported capture formats |
|---|
| 318 | + * @num_capture_formats: number of entries in capture_formats |
|---|
| 319 | + * @output_formats: array of supported output formats |
|---|
| 320 | + * @num_output_formats: number of entries in output_formats |
|---|
| 321 | + */ |
|---|
| 322 | +struct mtk_vcodec_enc_pdata { |
|---|
| 323 | + enum mtk_chip chip; |
|---|
| 324 | + |
|---|
| 325 | + bool uses_ext; |
|---|
| 326 | + bool has_lt_irq; |
|---|
| 327 | + unsigned long min_bitrate; |
|---|
| 328 | + unsigned long max_bitrate; |
|---|
| 329 | + const struct mtk_video_fmt *capture_formats; |
|---|
| 330 | + size_t num_capture_formats; |
|---|
| 331 | + const struct mtk_video_fmt *output_formats; |
|---|
| 332 | + size_t num_output_formats; |
|---|
| 333 | +}; |
|---|
| 334 | + |
|---|
| 335 | +#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext) |
|---|
| 336 | + |
|---|
| 307 | 337 | /** |
|---|
| 308 | 338 | * struct mtk_vcodec_dev - driver data |
|---|
| 309 | 339 | * @v4l2_dev: V4L2 device to register video devices for. |
|---|
| .. | .. |
|---|
| 313 | 343 | * @m2m_dev_dec: m2m device for decoder |
|---|
| 314 | 344 | * @m2m_dev_enc: m2m device for encoder. |
|---|
| 315 | 345 | * @plat_dev: platform device |
|---|
| 316 | | - * @vpu_plat_dev: mtk vpu platform device |
|---|
| 317 | 346 | * @ctx_list: list of struct mtk_vcodec_ctx |
|---|
| 318 | 347 | * @irqlock: protect data access by irq handler and work thread |
|---|
| 319 | 348 | * @curr_ctx: The context that is waiting for codec hardware |
|---|
| 320 | 349 | * |
|---|
| 321 | 350 | * @reg_base: Mapped address of MTK Vcodec registers. |
|---|
| 322 | 351 | * |
|---|
| 352 | + * @fw_handler: used to communicate with the firmware. |
|---|
| 323 | 353 | * @id_counter: used to identify current opened instance |
|---|
| 324 | 354 | * |
|---|
| 325 | 355 | * @encode_workqueue: encode work queue |
|---|
| .. | .. |
|---|
| 348 | 378 | struct v4l2_m2m_dev *m2m_dev_dec; |
|---|
| 349 | 379 | struct v4l2_m2m_dev *m2m_dev_enc; |
|---|
| 350 | 380 | struct platform_device *plat_dev; |
|---|
| 351 | | - struct platform_device *vpu_plat_dev; |
|---|
| 352 | 381 | struct list_head ctx_list; |
|---|
| 353 | 382 | spinlock_t irqlock; |
|---|
| 354 | 383 | struct mtk_vcodec_ctx *curr_ctx; |
|---|
| 355 | 384 | void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE]; |
|---|
| 385 | + const struct mtk_vcodec_enc_pdata *venc_pdata; |
|---|
| 386 | + |
|---|
| 387 | + struct mtk_vcodec_fw *fw_handler; |
|---|
| 356 | 388 | |
|---|
| 357 | 389 | unsigned long id_counter; |
|---|
| 358 | 390 | |
|---|