disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/media/platform/atmel/atmel-isc-regs.h
..
..
@@ -24,6 +24,8 @@
24
24
 #define ISC_PFE_CFG0_HPOL_LOW   BIT(0)
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25
 #define ISC_PFE_CFG0_VPOL_LOW   BIT(1)
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26
 #define ISC_PFE_CFG0_PPOL_LOW   BIT(2)
27
+#define ISC_PFE_CFG0_CCIR656    BIT(9)
28
+#define ISC_PFE_CFG0_CCIR_CRC   BIT(10)
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29
 
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 #define ISC_PFE_CFG0_MODE_PROGRESSIVE   (0x0 << 4)
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31
 #define ISC_PFE_CFG0_MODE_MASK          GENMASK(6, 4)
..
..
@@ -34,6 +36,25 @@
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 #define ISC_PFG_CFG0_BPS_ELEVEN (0x1 << 28)
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 #define ISC_PFG_CFG0_BPS_TWELVE (0x0 << 28)
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 #define ISC_PFE_CFG0_BPS_MASK   GENMASK(30, 28)
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+
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+#define ISC_PFE_CFG0_COLEN	BIT(12)
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+#define ISC_PFE_CFG0_ROWEN	BIT(13)
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+
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+/* ISC Parallel Front End Configuration 1 Register */
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+#define ISC_PFE_CFG1    0x00000010
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+
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+#define ISC_PFE_CFG1_COLMIN(v)		((v))
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+#define ISC_PFE_CFG1_COLMIN_MASK	GENMASK(15, 0)
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+#define ISC_PFE_CFG1_COLMAX(v)		((v) << 16)
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+#define ISC_PFE_CFG1_COLMAX_MASK	GENMASK(31, 16)
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+
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+/* ISC Parallel Front End Configuration 2 Register */
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+#define ISC_PFE_CFG2    0x00000014
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+
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+#define ISC_PFE_CFG2_ROWMIN(v)		((v))
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+#define ISC_PFE_CFG2_ROWMIN_MASK	GENMASK(15, 0)
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+#define ISC_PFE_CFG2_ROWMAX(v)		((v) << 16)
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+#define ISC_PFE_CFG2_ROWMAX_MASK	GENMASK(31, 16)
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58
 
38
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 /* ISC Clock Enable Register */
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60
 #define ISC_CLKEN               0x00000018
..
..
@@ -79,13 +100,13 @@
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100
 #define ISC_WB_O_RGR	0x00000060
80
101
 
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102
 /* ISC White Balance Offset for B, GB Register */
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-#define ISC_WB_O_BGR	0x00000064
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+#define ISC_WB_O_BGB	0x00000064
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104
 
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105
 /* ISC White Balance Gain for R, GR Register */
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 #define ISC_WB_G_RGR	0x00000068
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107
 
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 /* ISC White Balance Gain for B, GB Register */
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-#define ISC_WB_G_BGR	0x0000006c
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+#define ISC_WB_G_BGB	0x0000006c
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110
 
90
111
 /* ISC Color Filter Array Control Register */
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 #define ISC_CFA_CTRL    0x00000070