| .. | .. |
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| 672 | 672 | static int siw_sq_flush_wr(struct siw_qp *qp, const struct ib_send_wr *wr, |
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| 673 | 673 | const struct ib_send_wr **bad_wr) |
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| 674 | 674 | { |
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| 675 | | - struct siw_sqe sqe = {}; |
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| 676 | 675 | int rv = 0; |
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| 677 | 676 | |
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| 678 | 677 | while (wr) { |
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| 679 | | - sqe.id = wr->wr_id; |
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| 680 | | - sqe.opcode = wr->opcode; |
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| 681 | | - rv = siw_sqe_complete(qp, &sqe, 0, SIW_WC_WR_FLUSH_ERR); |
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| 678 | + struct siw_sqe sqe = {}; |
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| 679 | + |
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| 680 | + switch (wr->opcode) { |
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| 681 | + case IB_WR_RDMA_WRITE: |
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| 682 | + sqe.opcode = SIW_OP_WRITE; |
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| 683 | + break; |
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| 684 | + case IB_WR_RDMA_READ: |
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| 685 | + sqe.opcode = SIW_OP_READ; |
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| 686 | + break; |
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| 687 | + case IB_WR_RDMA_READ_WITH_INV: |
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| 688 | + sqe.opcode = SIW_OP_READ_LOCAL_INV; |
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| 689 | + break; |
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| 690 | + case IB_WR_SEND: |
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| 691 | + sqe.opcode = SIW_OP_SEND; |
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| 692 | + break; |
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| 693 | + case IB_WR_SEND_WITH_IMM: |
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| 694 | + sqe.opcode = SIW_OP_SEND_WITH_IMM; |
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| 695 | + break; |
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| 696 | + case IB_WR_SEND_WITH_INV: |
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| 697 | + sqe.opcode = SIW_OP_SEND_REMOTE_INV; |
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| 698 | + break; |
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| 699 | + case IB_WR_LOCAL_INV: |
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| 700 | + sqe.opcode = SIW_OP_INVAL_STAG; |
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| 701 | + break; |
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| 702 | + case IB_WR_REG_MR: |
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| 703 | + sqe.opcode = SIW_OP_REG_MR; |
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| 704 | + break; |
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| 705 | + default: |
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| 706 | + rv = -EINVAL; |
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| 707 | + break; |
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| 708 | + } |
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| 709 | + if (!rv) { |
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| 710 | + sqe.id = wr->wr_id; |
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| 711 | + rv = siw_sqe_complete(qp, &sqe, 0, |
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| 712 | + SIW_WC_WR_FLUSH_ERR); |
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| 713 | + } |
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| 682 | 714 | if (rv) { |
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| 683 | 715 | if (bad_wr) |
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| 684 | 716 | *bad_wr = wr; |
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| .. | .. |
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| 1455 | 1487 | |
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| 1456 | 1488 | if (pbl->max_buf < num_sle) { |
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| 1457 | 1489 | siw_dbg_mem(mem, "too many SGE's: %d > %d\n", |
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| 1458 | | - mem->pbl->max_buf, num_sle); |
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| 1490 | + num_sle, pbl->max_buf); |
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| 1459 | 1491 | return -ENOMEM; |
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| 1460 | 1492 | } |
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| 1461 | 1493 | for_each_sg(sl, slp, num_sle, i) { |
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