forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/drivers/iio/dac/ad5064.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R,
34 * AD5627, AD5627R, AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R,
....@@ -6,8 +7,6 @@
67 * Digital to analog converters driver
78 *
89 * Copyright 2011 Analog Devices Inc.
9
- *
10
- * Licensed under the GPL-2.
1110 */
1211
1312 #include <linux/device.h>
....@@ -69,8 +68,8 @@
6968 * struct ad5064_chip_info - chip specific information
7069 * @shared_vref: whether the vref supply is shared between channels
7170 * @internal_vref: internal reference voltage. 0 if the chip has no
72
- internal vref.
73
- * @channel: channel specification
71
+ * internal vref.
72
+ * @channels: channel specification
7473 * @num_channels: number of channels
7574 * @regmap_type: register map layout variant
7675 */
....@@ -99,6 +98,7 @@
9998 * @use_internal_vref: set to true if the internal reference voltage should be
10099 * used.
101100 * @write: register write callback
101
+ * @lock: maintain consistency between cached and dev state
102102 * @data: i2c/spi transfer buffers
103103 */
104104
....@@ -112,6 +112,7 @@
112112 bool use_internal_vref;
113113
114114 ad5064_write_func write;
115
+ struct mutex lock;
115116
116117 /*
117118 * DMA (thus cache coherency maintenance) requires the
....@@ -248,11 +249,11 @@
248249 struct ad5064_state *st = iio_priv(indio_dev);
249250 int ret;
250251
251
- mutex_lock(&indio_dev->mlock);
252
+ mutex_lock(&st->lock);
252253 st->pwr_down_mode[chan->channel] = mode + 1;
253254
254255 ret = ad5064_sync_powerdown_mode(st, chan);
255
- mutex_unlock(&indio_dev->mlock);
256
+ mutex_unlock(&st->lock);
256257
257258 return ret;
258259 }
....@@ -291,11 +292,11 @@
291292 if (ret)
292293 return ret;
293294
294
- mutex_lock(&indio_dev->mlock);
295
+ mutex_lock(&st->lock);
295296 st->pwr_down[chan->channel] = pwr_down;
296297
297298 ret = ad5064_sync_powerdown_mode(st, chan);
298
- mutex_unlock(&indio_dev->mlock);
299
+ mutex_unlock(&st->lock);
299300 return ret ? ret : len;
300301 }
301302
....@@ -349,12 +350,12 @@
349350 if (val >= (1 << chan->scan_type.realbits) || val < 0)
350351 return -EINVAL;
351352
352
- mutex_lock(&indio_dev->mlock);
353
+ mutex_lock(&st->lock);
353354 ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
354355 chan->address, val, chan->scan_type.shift);
355356 if (ret == 0)
356357 st->dac_cache[chan->channel] = val;
357
- mutex_unlock(&indio_dev->mlock);
358
+ mutex_unlock(&st->lock);
358359 break;
359360 default:
360361 ret = -EINVAL;
....@@ -786,7 +787,7 @@
786787 "vrefD",
787788 };
788789
789
-static const char * const ad5064_vref_name(struct ad5064_state *st,
790
+static const char *ad5064_vref_name(struct ad5064_state *st,
790791 unsigned int vref)
791792 {
792793 return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
....@@ -856,6 +857,7 @@
856857 return -ENOMEM;
857858
858859 st = iio_priv(indio_dev);
860
+ mutex_init(&st->lock);
859861 dev_set_drvdata(dev, indio_dev);
860862
861863 st->chip_info = &ad5064_chip_info_tbl[type];
....@@ -872,7 +874,6 @@
872874 return ret;
873875 }
874876
875
- indio_dev->dev.parent = dev;
876877 indio_dev->name = name;
877878 indio_dev->info = &ad5064_info;
878879 indio_dev->modes = INDIO_DIRECT_MODE;