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2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/iio/adc/ti-ads7950.c
..
..
@@ -9,7 +9,7 @@
9
9
  * Copyright 2012 CS Systemes d'Information
10
10
  *
11
11
  * And also on hwmon/ads79xx.c
12
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
12
+ * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
13
13
  *	Nishanth Menon
14
14
  */
15
15
 
..
..
@@ -17,6 +17,7 @@
17
17
 #include <linux/bitops.h>
18
18
 #include <linux/device.h>
19
19
 #include <linux/err.h>
20
+#include <linux/gpio/driver.h>
20
21
 #include <linux/interrupt.h>
21
22
 #include <linux/kernel.h>
22
23
 #include <linux/module.h>
..
..
@@ -36,12 +37,15 @@
36
37
  */
37
38
 #define TI_ADS7950_VA_MV_ACPI_DEFAULT	5000
38
39
 
40
+#define TI_ADS7950_CR_GPIO	BIT(14)
39
41
 #define TI_ADS7950_CR_MANUAL	BIT(12)
40
42
 #define TI_ADS7950_CR_WRITE	BIT(11)
41
43
 #define TI_ADS7950_CR_CHAN(ch)	((ch) << 7)
42
44
 #define TI_ADS7950_CR_RANGE_5V	BIT(6)
45
+#define TI_ADS7950_CR_GPIO_DATA	BIT(4)
43
46
 
44
47
 #define TI_ADS7950_MAX_CHAN	16
48
+#define TI_ADS7950_NUM_GPIOS	4
45
49
 
46
50
 #define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16))
47
51
 
..
..
@@ -49,30 +53,63 @@
49
53
 #define TI_ADS7950_EXTRACT(val, dec, bits) \
50
54
 	(((val) >> (dec)) & ((1 << (bits)) - 1))
51
55
 
56
+#define TI_ADS7950_MAN_CMD(cmd)         (TI_ADS7950_CR_MANUAL | (cmd))
57
+#define TI_ADS7950_GPIO_CMD(cmd)        (TI_ADS7950_CR_GPIO | (cmd))
58
+
59
+/* Manual mode configuration */
60
+#define TI_ADS7950_MAN_CMD_SETTINGS(st) \
61
+	(TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
62
+/* GPIO mode configuration */
63
+#define TI_ADS7950_GPIO_CMD_SETTINGS(st) \
64
+	(TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
65
+
52
66
 struct ti_ads7950_state {
53
67
 	struct spi_device	*spi;
54
-	struct spi_transfer	ring_xfer[TI_ADS7950_MAX_CHAN + 2];
68
+	struct spi_transfer	ring_xfer;
55
69
 	struct spi_transfer	scan_single_xfer[3];
56
70
 	struct spi_message	ring_msg;
57
71
 	struct spi_message	scan_single_msg;
58
72
 
59
73
 	/* Lock to protect the spi xfer buffers */
60
74
 	struct mutex		slock;
75
+	struct gpio_chip	chip;
61
76
 
62
77
 	struct regulator	*reg;
63
78
 	unsigned int		vref_mv;
64
79
 
65
-	unsigned int		settings;
80
+	/*
81
+	 * Bitmask of lower 7 bits used for configuration
82
+	 * These bits only can be written when TI_ADS7950_CR_WRITE
83
+	 * is set, otherwise it retains its original state.
84
+	 * [0-3] GPIO signal
85
+	 * [4]   Set following frame to return GPIO signal values
86
+	 * [5]   Powers down device
87
+	 * [6]   Sets Vref range1(2.5v) or range2(5v)
88
+	 *
89
+	 * Bits present on Manual/Auto1/Auto2 commands
90
+	 */
91
+	unsigned int		cmd_settings_bitmask;
92
+
93
+	/*
94
+	 * Bitmask of GPIO command
95
+	 * [0-3] GPIO direction
96
+	 * [4-6] Different GPIO alarm mode configurations
97
+	 * [7]   GPIO 2 as device range input
98
+	 * [8]   GPIO 3 as device power down input
99
+	 * [9]   Reset all registers
100
+	 * [10-11] N/A
101
+	 */
102
+	unsigned int		gpio_cmd_settings_bitmask;
66
103
 
67
104
 	/*
68
105
 	 * DMA (thus cache coherency maintenance) requires the
69
106
 	 * transfer buffers to live in their own cache lines.
70
107
 	 */
71
-	__be16	rx_buf[TI_ADS7950_MAX_CHAN + TI_ADS7950_TIMESTAMP_SIZE]
108
+	u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE]
72
109
 							____cacheline_aligned;
73
-	__be16	tx_buf[TI_ADS7950_MAX_CHAN];
74
-	__be16			single_tx;
75
-	__be16			single_rx;
110
+	u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
111
+	u16 single_tx;
112
+	u16 single_rx;
76
113
 
77
114
 };
78
115
 
..
..
@@ -111,7 +148,7 @@
111
148
 		.realbits = bits,				\
112
149
 		.storagebits = 16,				\
113
150
 		.shift = 12 - (bits),				\
114
-		.endianness = IIO_BE,				\
151
+		.endianness = IIO_CPU,				\
115
152
 	},							\
116
153
 }
117
154
 
..
..
@@ -251,24 +288,15 @@
251
288
 
252
289
 	len = 0;
253
290
 	for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) {
254
-		cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(i) | st->settings;
255
-		st->tx_buf[len++] = cpu_to_be16(cmd);
291
+		cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(i));
292
+		st->tx_buf[len++] = cmd;
256
293
 	}
257
294
 
258
295
 	/* Data for the 1st channel is not returned until the 3rd transfer */
259
-	len += 2;
260
-	for (i = 0; i < len; i++) {
261
-		if ((i + 2) < len)
262
-			st->ring_xfer[i].tx_buf = &st->tx_buf[i];
263
-		if (i >= 2)
264
-			st->ring_xfer[i].rx_buf = &st->rx_buf[i - 2];
265
-		st->ring_xfer[i].len = 2;
266
-		st->ring_xfer[i].cs_change = 1;
267
-	}
268
-	/* make sure last transfer's cs_change is not set */
269
-	st->ring_xfer[len - 1].cs_change = 0;
296
+	st->tx_buf[len++] = 0;
297
+	st->tx_buf[len++] = 0;
270
298
 
271
-	spi_message_init_with_transfers(&st->ring_msg, st->ring_xfer, len);
299
+	st->ring_xfer.len = len * 2;
272
300
 
273
301
 	return 0;
274
302
 }
..
..
@@ -285,7 +313,7 @@
285
313
 	if (ret < 0)
286
314
 		goto out;
287
315
 
288
-	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
316
+	iio_push_to_buffers_with_timestamp(indio_dev, &st->rx_buf[2],
289
317
 					   iio_get_time_ns(indio_dev));
290
318
 
291
319
 out:
..
..
@@ -301,15 +329,14 @@
301
329
 	int ret, cmd;
302
330
 
303
331
 	mutex_lock(&st->slock);
304
-
305
-	cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(ch) | st->settings;
306
-	st->single_tx = cpu_to_be16(cmd);
332
+	cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(ch));
333
+	st->single_tx = cmd;
307
334
 
308
335
 	ret = spi_sync(st->spi, &st->scan_single_msg);
309
336
 	if (ret)
310
337
 		goto out;
311
338
 
312
-	ret = be16_to_cpu(st->single_rx);
339
+	ret = st->single_rx;
313
340
 
314
341
 out:
315
342
 	mutex_unlock(&st->slock);
..
..
@@ -331,7 +358,7 @@
331
358
 		vref /= 1000;
332
359
 	}
333
360
 
334
-	if (st->settings & TI_ADS7950_CR_RANGE_5V)
361
+	if (st->cmd_settings_bitmask & TI_ADS7950_CR_RANGE_5V)
335
362
 		vref *= 2;
336
363
 
337
364
 	return vref;
..
..
@@ -376,12 +403,146 @@
376
403
 	.update_scan_mode	= ti_ads7950_update_scan_mode,
377
404
 };
378
405
 
406
+static void ti_ads7950_set(struct gpio_chip *chip, unsigned int offset,
407
+			   int value)
408
+{
409
+	struct ti_ads7950_state *st = gpiochip_get_data(chip);
410
+
411
+	mutex_lock(&st->slock);
412
+
413
+	if (value)
414
+		st->cmd_settings_bitmask |= BIT(offset);
415
+	else
416
+		st->cmd_settings_bitmask &= ~BIT(offset);
417
+
418
+	st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
419
+	spi_sync(st->spi, &st->scan_single_msg);
420
+
421
+	mutex_unlock(&st->slock);
422
+}
423
+
424
+static int ti_ads7950_get(struct gpio_chip *chip, unsigned int offset)
425
+{
426
+	struct ti_ads7950_state *st = gpiochip_get_data(chip);
427
+	int ret;
428
+
429
+	mutex_lock(&st->slock);
430
+
431
+	/* If set as output, return the output */
432
+	if (st->gpio_cmd_settings_bitmask & BIT(offset)) {
433
+		ret = st->cmd_settings_bitmask & BIT(offset);
434
+		goto out;
435
+	}
436
+
437
+	/* GPIO data bit sets SDO bits 12-15 to GPIO input */
438
+	st->cmd_settings_bitmask |= TI_ADS7950_CR_GPIO_DATA;
439
+	st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
440
+	ret = spi_sync(st->spi, &st->scan_single_msg);
441
+	if (ret)
442
+		goto out;
443
+
444
+	ret = ((st->single_rx >> 12) & BIT(offset)) ? 1 : 0;
445
+
446
+	/* Revert back to original settings */
447
+	st->cmd_settings_bitmask &= ~TI_ADS7950_CR_GPIO_DATA;
448
+	st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
449
+	ret = spi_sync(st->spi, &st->scan_single_msg);
450
+	if (ret)
451
+		goto out;
452
+
453
+out:
454
+	mutex_unlock(&st->slock);
455
+
456
+	return ret;
457
+}
458
+
459
+static int ti_ads7950_get_direction(struct gpio_chip *chip,
460
+				    unsigned int offset)
461
+{
462
+	struct ti_ads7950_state *st = gpiochip_get_data(chip);
463
+
464
+	/* Bitmask is inverted from GPIO framework 0=input/1=output */
465
+	return !(st->gpio_cmd_settings_bitmask & BIT(offset));
466
+}
467
+
468
+static int _ti_ads7950_set_direction(struct gpio_chip *chip, int offset,
469
+				     int input)
470
+{
471
+	struct ti_ads7950_state *st = gpiochip_get_data(chip);
472
+	int ret = 0;
473
+
474
+	mutex_lock(&st->slock);
475
+
476
+	/* Only change direction if needed */
477
+	if (input && (st->gpio_cmd_settings_bitmask & BIT(offset)))
478
+		st->gpio_cmd_settings_bitmask &= ~BIT(offset);
479
+	else if (!input && !(st->gpio_cmd_settings_bitmask & BIT(offset)))
480
+		st->gpio_cmd_settings_bitmask |= BIT(offset);
481
+	else
482
+		goto out;
483
+
484
+	st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
485
+	ret = spi_sync(st->spi, &st->scan_single_msg);
486
+
487
+out:
488
+	mutex_unlock(&st->slock);
489
+
490
+	return ret;
491
+}
492
+
493
+static int ti_ads7950_direction_input(struct gpio_chip *chip,
494
+				      unsigned int offset)
495
+{
496
+	return _ti_ads7950_set_direction(chip, offset, 1);
497
+}
498
+
499
+static int ti_ads7950_direction_output(struct gpio_chip *chip,
500
+				       unsigned int offset, int value)
501
+{
502
+	ti_ads7950_set(chip, offset, value);
503
+
504
+	return _ti_ads7950_set_direction(chip, offset, 0);
505
+}
506
+
507
+static int ti_ads7950_init_hw(struct ti_ads7950_state *st)
508
+{
509
+	int ret = 0;
510
+
511
+	mutex_lock(&st->slock);
512
+
513
+	/* Settings for Manual/Auto1/Auto2 commands */
514
+	/* Default to 5v ref */
515
+	st->cmd_settings_bitmask = TI_ADS7950_CR_RANGE_5V;
516
+	st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
517
+	ret = spi_sync(st->spi, &st->scan_single_msg);
518
+	if (ret)
519
+		goto out;
520
+
521
+	/* Settings for GPIO command */
522
+	st->gpio_cmd_settings_bitmask = 0x0;
523
+	st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
524
+	ret = spi_sync(st->spi, &st->scan_single_msg);
525
+
526
+out:
527
+	mutex_unlock(&st->slock);
528
+
529
+	return ret;
530
+}
531
+
379
532
 static int ti_ads7950_probe(struct spi_device *spi)
380
533
 {
381
534
 	struct ti_ads7950_state *st;
382
535
 	struct iio_dev *indio_dev;
383
536
 	const struct ti_ads7950_chip_info *info;
384
537
 	int ret;
538
+
539
+	spi->bits_per_word = 16;
540
+	spi->mode |= SPI_CS_WORD;
541
+	ret = spi_setup(spi);
542
+	if (ret < 0) {
543
+		dev_err(&spi->dev, "Error in spi setup\n");
544
+		return ret;
545
+	}
385
546
 
386
547
 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
387
548
 	if (!indio_dev)
..
..
@@ -392,16 +553,23 @@
392
553
 	spi_set_drvdata(spi, indio_dev);
393
554
 
394
555
 	st->spi = spi;
395
-	st->settings = TI_ADS7950_CR_MANUAL | TI_ADS7950_CR_RANGE_5V;
396
556
 
397
557
 	info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data];
398
558
 
399
559
 	indio_dev->name = spi_get_device_id(spi)->name;
400
-	indio_dev->dev.parent = &spi->dev;
401
560
 	indio_dev->modes = INDIO_DIRECT_MODE;
402
561
 	indio_dev->channels = info->channels;
403
562
 	indio_dev->num_channels = info->num_channels;
404
563
 	indio_dev->info = &ti_ads7950_info;
564
+
565
+	/* build spi ring message */
566
+	spi_message_init(&st->ring_msg);
567
+
568
+	st->ring_xfer.tx_buf = &st->tx_buf[0];
569
+	st->ring_xfer.rx_buf = &st->rx_buf[0];
570
+	/* len will be set later */
571
+
572
+	spi_message_add_tail(&st->ring_xfer, &st->ring_msg);
405
573
 
406
574
 	/*
407
575
 	 * Setup default message. The sample is read at the end of the first
..
..
@@ -432,7 +600,7 @@
432
600
 
433
601
 	st->reg = devm_regulator_get(&spi->dev, "vref");
434
602
 	if (IS_ERR(st->reg)) {
435
-		dev_err(&spi->dev, "Failed get get regulator \"vref\"\n");
603
+		dev_err(&spi->dev, "Failed to get regulator \"vref\"\n");
436
604
 		ret = PTR_ERR(st->reg);
437
605
 		goto error_destroy_mutex;
438
606
 	}
..
..
@@ -450,14 +618,41 @@
450
618
 		goto error_disable_reg;
451
619
 	}
452
620
 
621
+	ret = ti_ads7950_init_hw(st);
622
+	if (ret) {
623
+		dev_err(&spi->dev, "Failed to init adc chip\n");
624
+		goto error_cleanup_ring;
625
+	}
626
+
453
627
 	ret = iio_device_register(indio_dev);
454
628
 	if (ret) {
455
629
 		dev_err(&spi->dev, "Failed to register iio device\n");
456
630
 		goto error_cleanup_ring;
457
631
 	}
458
632
 
633
+	/* Add GPIO chip */
634
+	st->chip.label = dev_name(&st->spi->dev);
635
+	st->chip.parent = &st->spi->dev;
636
+	st->chip.owner = THIS_MODULE;
637
+	st->chip.can_sleep = true;
638
+	st->chip.base = -1;
639
+	st->chip.ngpio = TI_ADS7950_NUM_GPIOS;
640
+	st->chip.get_direction = ti_ads7950_get_direction;
641
+	st->chip.direction_input = ti_ads7950_direction_input;
642
+	st->chip.direction_output = ti_ads7950_direction_output;
643
+	st->chip.get = ti_ads7950_get;
644
+	st->chip.set = ti_ads7950_set;
645
+
646
+	ret = gpiochip_add_data(&st->chip, st);
647
+	if (ret) {
648
+		dev_err(&spi->dev, "Failed to init GPIOs\n");
649
+		goto error_iio_device;
650
+	}
651
+
459
652
 	return 0;
460
653
 
654
+error_iio_device:
655
+	iio_device_unregister(indio_dev);
461
656
 error_cleanup_ring:
462
657
 	iio_triggered_buffer_cleanup(indio_dev);
463
658
 error_disable_reg:
..
..
@@ -473,6 +668,7 @@
473
668
 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
474
669
 	struct ti_ads7950_state *st = iio_priv(indio_dev);
475
670
 
671
+	gpiochip_remove(&st->chip);
476
672
 	iio_device_unregister(indio_dev);
477
673
 	iio_triggered_buffer_cleanup(indio_dev);
478
674
 	regulator_disable(st->reg);