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2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/gpu/drm/vc4/vc4_drv.h
....@@ -1,20 +1,27 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * Copyright (C) 2015 Broadcom
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
74  */
5
+#ifndef _VC4_DRV_H_
6
+#define _VC4_DRV_H_
87 
9
-#include <linux/mm_types.h>
10
-#include <linux/reservation.h>
11
-#include <drm/drmP.h>
8
+#include <linux/delay.h>
9
+#include <linux/refcount.h>
10
+#include <linux/uaccess.h>
11
+
12
+#include <drm/drm_atomic.h>
13
+#include <drm/drm_debugfs.h>
14
+#include <drm/drm_device.h>
1215 #include <drm/drm_encoder.h>
1316 #include <drm/drm_gem_cma_helper.h>
14
-#include <drm/drm_atomic.h>
15
-#include <drm/drm_syncobj.h>
17
+#include <drm/drm_managed.h>
18
+#include <drm/drm_mm.h>
19
+#include <drm/drm_modeset_lock.h>
1620 
1721 #include "uapi/drm/vc4_drm.h"
22
+
23
+struct drm_device;
24
+struct drm_gem_object;
1825 
1926 /* Don't forget to update vc4_bo.c: bo_type_names[] when adding to
2027  * this.
....@@ -61,17 +68,15 @@
6168 	 * Note that counter values can't be reset, but you can fake a reset by
6269 	 * destroying the perfmon and creating a new one.
6370 	 */
64
-	u64 counters[0];
71
+	u64 counters[];
6572 };
6673 
6774 struct vc4_dev {
68
-	struct drm_device *dev;
75
+	struct drm_device base;
6976 
70
-	struct vc4_hdmi *hdmi;
7177 	struct vc4_hvs *hvs;
7278 	struct vc4_v3d *v3d;
7379 	struct vc4_dpi *dpi;
74
-	struct vc4_dsi *dsi1;
7580 	struct vc4_vec *vec;
7681 	struct vc4_txp *txp;
7782 
....@@ -184,9 +189,22 @@
184189 	/* Bitmask of the current bin_alloc used for overflow memory. */
185190 	uint32_t bin_alloc_overflow;
186191 
192
+	/* Incremented when an underrun error happened after an atomic commit.
193
+	 * This is particularly useful to detect when a specific modeset is too
194
+	 * demanding in term of memory or HVS bandwidth which is hard to guess
195
+	 * at atomic check time.
196
+	 */
197
+	atomic_t underrun;
198
+
187199 	struct work_struct overflow_mem_work;
188200 
189201 	int power_refcount;
202
+
203
+	/* Set to true when the load tracker is supported. */
204
+	bool load_tracker_available;
205
+
206
+	/* Set to true when the load tracker is active. */
207
+	bool load_tracker_enabled;
190208 
191209 	/* Mutex controlling the power refcount. */
192210 	struct mutex power_lock;
....@@ -200,12 +218,24 @@
200218 
201219 	struct drm_modeset_lock ctm_state_lock;
202220 	struct drm_private_obj ctm_manager;
221
+	struct drm_private_obj hvs_channels;
222
+	struct drm_private_obj load_tracker;
223
+
224
+	/* List of vc4_debugfs_info_entry for adding to debugfs once
225
+	 * the minor is available (after drm_dev_register()).
226
+	 */
227
+	struct list_head debugfs_list;
228
+
229
+	/* Mutex for binner bo allocation. */
230
+	struct mutex bin_bo_lock;
231
+	/* Reference count for our binner bo. */
232
+	struct kref bin_bo_kref;
203233 };
204234 
205235 static inline struct vc4_dev *
206236 to_vc4_dev(struct drm_device *dev)
207237 {
208
-	return (struct vc4_dev *)dev->dev_private;
238
+	return container_of(dev, struct vc4_dev, base);
209239 }
210240 
211241 struct vc4_bo {
....@@ -239,10 +269,6 @@
239269 	 */
240270 	struct vc4_validated_shader_info *validated_shader;
241271 
242
-	/* normally (resv == &_resv) except for imported bo's */
243
-	struct reservation_object *resv;
244
-	struct reservation_object _resv;
245
-
246272 	/* One of enum vc4_kernel_bo_type, or VC4_BO_TYPE_COUNT + i
247273 	 * for user-allocated labels.
248274 	 */
....@@ -262,7 +288,7 @@
262288 static inline struct vc4_bo *
263289 to_vc4_bo(struct drm_gem_object *bo)
264290 {
265
-	return (struct vc4_bo *)bo;
291
+	return container_of(to_drm_gem_cma_obj(bo), struct vc4_bo, base);
266292 }
267293 
268294 struct vc4_fence {
....@@ -275,7 +301,7 @@
275301 static inline struct vc4_fence *
276302 to_vc4_fence(struct dma_fence *fence)
277303 {
278
-	return (struct vc4_fence *)fence;
304
+	return container_of(fence, struct vc4_fence, base);
279305 }
280306 
281307 struct vc4_seqno_cb {
....@@ -289,12 +315,15 @@
289315 	struct platform_device *pdev;
290316 	void __iomem *regs;
291317 	struct clk *clk;
318
+	struct debugfs_regset32 regset;
292319 };
293320 
294321 struct vc4_hvs {
295322 	struct platform_device *pdev;
296323 	void __iomem *regs;
297324 	u32 __iomem *dlist;
325
+
326
+	struct clk *core_clk;
298327 
299328 	/* Memory manager for CRTCs to allocate space in the display
300329 	 * list.  Units are dwords.
....@@ -305,6 +334,11 @@
305334 	spinlock_t mm_lock;
306335 
307336 	struct drm_mm_node mitchell_netravali_filter;
337
+
338
+	struct debugfs_regset32 regset;
339
+
340
+	/* HVS version 5 flag, therefore requires updated dlist structures */
341
+	bool hvs5;
308342 };
309343 
310344 struct vc4_plane {
....@@ -314,7 +348,7 @@
314348 static inline struct vc4_plane *
315349 to_vc4_plane(struct drm_plane *plane)
316350 {
317
-	return (struct vc4_plane *)plane;
351
+	return container_of(plane, struct vc4_plane, base);
318352 }
319353 
320354 enum vc4_scaling_mode {
....@@ -338,6 +372,7 @@
338372 	u32 pos0_offset;
339373 	u32 pos2_offset;
340374 	u32 ptr0_offset;
375
+	u32 lbm_offset;
341376 
342377 	/* Offset where the plane's dlist was last stored in the
343378 	 * hardware at vc4_crtc_atomic_flush() time.
....@@ -369,17 +404,33 @@
369404 	 * to enable background color fill.
370405 	 */
371406 	bool needs_bg_fill;
407
+
408
+	/* Mark the dlist as initialized. Useful to avoid initializing it twice
409
+	 * when async update is not possible.
410
+	 */
411
+	bool dlist_initialized;
412
+
413
+	/* Load of this plane on the HVS block. The load is expressed in HVS
414
+	 * cycles/sec.
415
+	 */
416
+	u64 hvs_load;
417
+
418
+	/* Memory bandwidth needed for this plane. This is expressed in
419
+	 * bytes/sec.
420
+	 */
421
+	u64 membus_load;
372422 };
373423 
374424 static inline struct vc4_plane_state *
375425 to_vc4_plane_state(struct drm_plane_state *state)
376426 {
377
-	return (struct vc4_plane_state *)state;
427
+	return container_of(state, struct vc4_plane_state, base);
378428 }
379429 
380430 enum vc4_encoder_type {
381431 	VC4_ENCODER_TYPE_NONE,
382
-	VC4_ENCODER_TYPE_HDMI,
432
+	VC4_ENCODER_TYPE_HDMI0,
433
+	VC4_ENCODER_TYPE_HDMI1,
383434 	VC4_ENCODER_TYPE_VEC,
384435 	VC4_ENCODER_TYPE_DSI0,
385436 	VC4_ENCODER_TYPE_DSI1,
....@@ -391,6 +442,13 @@
391442 	struct drm_encoder base;
392443 	enum vc4_encoder_type type;
393444 	u32 clock_select;
445
+
446
+	void (*pre_crtc_configure)(struct drm_encoder *encoder);
447
+	void (*pre_crtc_enable)(struct drm_encoder *encoder);
448
+	void (*post_crtc_enable)(struct drm_encoder *encoder);
449
+
450
+	void (*post_crtc_disable)(struct drm_encoder *encoder);
451
+	void (*post_crtc_powerdown)(struct drm_encoder *encoder);
394452 };
395453 
396454 static inline struct vc4_encoder *
....@@ -400,42 +458,98 @@
400458 }
401459 
402460 struct vc4_crtc_data {
403
-	/* Which channel of the HVS this pixelvalve sources from. */
404
-	int hvs_channel;
461
+	/* Bitmask of channels (FIFOs) of the HVS that the output can source from */
462
+	unsigned int hvs_available_channels;
463
+
464
+	/* Which output of the HVS this pixelvalve sources from. */
465
+	int hvs_output;
466
+};
467
+
468
+struct vc4_pv_data {
469
+	struct vc4_crtc_data	base;
470
+
471
+	/* Depth of the PixelValve FIFO in bytes */
472
+	unsigned int fifo_depth;
473
+
474
+	/* Number of pixels output per clock period */
475
+	u8 pixels_per_clock;
405476 
406477 	enum vc4_encoder_type encoder_types[4];
478
+	const char *debugfs_name;
479
+
407480 };
408481 
409482 struct vc4_crtc {
410483 	struct drm_crtc base;
484
+	struct platform_device *pdev;
411485 	const struct vc4_crtc_data *data;
412486 	void __iomem *regs;
413487 
414488 	/* Timestamp at start of vblank irq - unaffected by lock delays. */
415489 	ktime_t t_vblank;
416490 
417
-	/* Which HVS channel we're using for our CRTC. */
418
-	int channel;
419
-
420491 	u8 lut_r[256];
421492 	u8 lut_g[256];
422493 	u8 lut_b[256];
423
-	/* Size in pixels of the COB memory allocated to this CRTC. */
424
-	u32 cob_size;
425494 
426495 	struct drm_pending_vblank_event *event;
496
+
497
+	struct debugfs_regset32 regset;
427498 };
428499 
429500 static inline struct vc4_crtc *
430501 to_vc4_crtc(struct drm_crtc *crtc)
431502 {
432
-	return (struct vc4_crtc *)crtc;
503
+	return container_of(crtc, struct vc4_crtc, base);
504
+}
505
+
506
+static inline const struct vc4_crtc_data *
507
+vc4_crtc_to_vc4_crtc_data(const struct vc4_crtc *crtc)
508
+{
509
+	return crtc->data;
510
+}
511
+
512
+static inline const struct vc4_pv_data *
513
+vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc)
514
+{
515
+	const struct vc4_crtc_data *data = vc4_crtc_to_vc4_crtc_data(crtc);
516
+
517
+	return container_of(data, struct vc4_pv_data, base);
518
+}
519
+
520
+struct vc4_crtc_state {
521
+	struct drm_crtc_state base;
522
+	/* Dlist area for this CRTC configuration. */
523
+	struct drm_mm_node mm;
524
+	bool feed_txp;
525
+	bool txp_armed;
526
+	unsigned int assigned_channel;
527
+
528
+	struct {
529
+		unsigned int left;
530
+		unsigned int right;
531
+		unsigned int top;
532
+		unsigned int bottom;
533
+	} margins;
534
+
535
+	/* Transitional state below, only valid during atomic commits */
536
+	bool update_muxing;
537
+};
538
+
539
+#define VC4_HVS_CHANNEL_DISABLED ((unsigned int)-1)
540
+
541
+static inline struct vc4_crtc_state *
542
+to_vc4_crtc_state(struct drm_crtc_state *crtc_state)
543
+{
544
+	return container_of(crtc_state, struct vc4_crtc_state, base);
433545 }
434546 
435547 #define V3D_READ(offset) readl(vc4->v3d->regs + offset)
436548 #define V3D_WRITE(offset, val) writel(val, vc4->v3d->regs + offset)
437549 #define HVS_READ(offset) readl(vc4->hvs->regs + offset)
438550 #define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset)
551
+
552
+#define VC4_REG32(reg) { .name = #reg, .offset = reg }
439553 
440554 struct vc4_exec_info {
441555 	/* Sequence number for this bin/render job. */
....@@ -548,6 +662,11 @@
548662 	 * NULL otherwise.
549663 	 */
550664 	struct vc4_perfmon *perfmon;
665
+
666
+	/* Whether the exec has taken a reference to the binner BO, which should
667
+	 * happen with a VC4_PACKET_TILE_BINNING_MODE_CONFIG packet.
668
+	 */
669
+	bool bin_bo_used;
551670 };
552671 
553672 /* Per-open file private data. Any driver-specific resource that has to be
....@@ -558,6 +677,8 @@
558677 		struct idr idr;
559678 		struct mutex lock;
560679 	} perfmon;
680
+
681
+	bool bin_bo_used;
561682 };
562683 
563684 static inline struct vc4_exec_info *
....@@ -625,32 +746,41 @@
625746 };
626747 
627748 /**
628
- * _wait_for - magic (register) wait macro
749
+ * __wait_for - magic wait macro
629750  *
630
- * Does the right thing for modeset paths when run under kdgb or similar atomic
631
- * contexts. Note that it's important that we check the condition again after
632
- * having timed out, since the timeout could be due to preemption or similar and
633
- * we've never had a chance to check the condition before the timeout.
751
+ * Macro to help avoid open coding check/wait/timeout patterns. Note that it's
752
+ * important that we check the condition again after having timed out, since the
753
+ * timeout could be due to preemption or similar and we've never had a chance to
754
+ * check the condition before the timeout.
634755  */
635
-#define _wait_for(COND, MS, W) ({ \
636
-	unsigned long timeout__ = jiffies + msecs_to_jiffies(MS) + 1;	\
637
-	int ret__ = 0;							\
638
-	while (!(COND)) {						\
639
-		if (time_after(jiffies, timeout__)) {			\
640
-			if (!(COND))					\
641
-				ret__ = -ETIMEDOUT;			\
756
+#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
757
+	const ktime_t end__ = ktime_add_ns(ktime_get_raw(), 1000ll * (US)); \
758
+	long wait__ = (Wmin); /* recommended min for usleep is 10 us */	\
759
+	int ret__;							\
760
+	might_sleep();							\
761
+	for (;;) {							\
762
+		const bool expired__ = ktime_after(ktime_get_raw(), end__); \
763
+		OP;							\
764
+		/* Guarantee COND check prior to timeout */		\
765
+		barrier();						\
766
+		if (COND) {						\
767
+			ret__ = 0;					\
642768 			break;						\
643769 		}							\
644
-		if (W && drm_can_sleep())  {				\
645
-			msleep(W);					\
646
-		} else {						\
647
-			cpu_relax();					\
770
+		if (expired__) {					\
771
+			ret__ = -ETIMEDOUT;				\
772
+			break;						\
648773 		}							\
774
+		usleep_range(wait__, wait__ * 2);			\
775
+		if (wait__ < (Wmax))					\
776
+			wait__ <<= 1;					\
649777 	}								\
650778 	ret__;								\
651779 })
652780 
653
-#define wait_for(COND, MS) _wait_for(COND, MS, 1)
781
+#define _wait_for(COND, US, Wmin, Wmax)	__wait_for(, (COND), (US), (Wmin), \
782
+						   (Wmax))
783
+#define wait_for(COND, MS)		_wait_for((COND), (MS) * 1000, 10, 1000)
654784 
655785 /* vc4_bo.c */
656786 struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size);
....@@ -660,8 +790,7 @@
660790 int vc4_dumb_create(struct drm_file *file_priv,
661791 		    struct drm_device *dev,
662792 		    struct drm_mode_create_dumb *args);
663
-struct dma_buf *vc4_prime_export(struct drm_device *dev,
664
-				 struct drm_gem_object *obj, int flags);
793
+struct dma_buf *vc4_prime_export(struct drm_gem_object *obj, int flags);
665794 int vc4_create_bo_ioctl(struct drm_device *dev, void *data,
666795 			struct drm_file *file_priv);
667796 int vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data,
....@@ -678,15 +807,12 @@
678807 		       struct drm_file *file_priv);
679808 vm_fault_t vc4_fault(struct vm_fault *vmf);
680809 int vc4_mmap(struct file *filp, struct vm_area_struct *vma);
681
-struct reservation_object *vc4_prime_res_obj(struct drm_gem_object *obj);
682810 int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
683811 struct drm_gem_object *vc4_prime_import_sg_table(struct drm_device *dev,
684812 						 struct dma_buf_attachment *attach,
685813 						 struct sg_table *sgt);
686814 void *vc4_prime_vmap(struct drm_gem_object *obj);
687815 int vc4_bo_cache_init(struct drm_device *dev);
688
-void vc4_bo_cache_destroy(struct drm_device *dev);
689
-int vc4_bo_stats_debugfs(struct seq_file *m, void *arg);
690816 int vc4_bo_inc_usecnt(struct vc4_bo *bo);
691817 void vc4_bo_dec_usecnt(struct vc4_bo *bo);
692818 void vc4_bo_add_to_purgeable_pool(struct vc4_bo *bo);
....@@ -694,34 +820,64 @@
694820 
695821 /* vc4_crtc.c */
696822 extern struct platform_driver vc4_crtc_driver;
697
-int vc4_crtc_debugfs_regs(struct seq_file *m, void *arg);
698
-bool vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
699
-			     bool in_vblank_irq, int *vpos, int *hpos,
700
-			     ktime_t *stime, ktime_t *etime,
701
-			     const struct drm_display_mode *mode);
823
+int vc4_crtc_disable_at_boot(struct drm_crtc *crtc);
824
+int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
825
+		  const struct drm_crtc_funcs *crtc_funcs,
826
+		  const struct drm_crtc_helper_funcs *crtc_helper_funcs);
827
+void vc4_crtc_destroy(struct drm_crtc *crtc);
828
+int vc4_page_flip(struct drm_crtc *crtc,
829
+		  struct drm_framebuffer *fb,
830
+		  struct drm_pending_vblank_event *event,
831
+		  uint32_t flags,
832
+		  struct drm_modeset_acquire_ctx *ctx);
833
+struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc);
834
+void vc4_crtc_destroy_state(struct drm_crtc *crtc,
835
+			    struct drm_crtc_state *state);
836
+void vc4_crtc_reset(struct drm_crtc *crtc);
702837 void vc4_crtc_handle_vblank(struct vc4_crtc *crtc);
703
-void vc4_crtc_txp_armed(struct drm_crtc_state *state);
838
+void vc4_crtc_get_margins(struct drm_crtc_state *state,
839
+			  unsigned int *left, unsigned int *right,
840
+			  unsigned int *top, unsigned int *bottom);
704841 
705842 /* vc4_debugfs.c */
706
-int vc4_debugfs_init(struct drm_minor *minor);
843
+void vc4_debugfs_init(struct drm_minor *minor);
844
+#ifdef CONFIG_DEBUG_FS
845
+void vc4_debugfs_add_file(struct drm_device *drm,
846
+			  const char *filename,
847
+			  int (*show)(struct seq_file*, void*),
848
+			  void *data);
849
+void vc4_debugfs_add_regset32(struct drm_device *drm,
850
+			      const char *filename,
851
+			      struct debugfs_regset32 *regset);
852
+#else
853
+static inline void vc4_debugfs_add_file(struct drm_device *drm,
854
+					const char *filename,
855
+					int (*show)(struct seq_file*, void*),
856
+					void *data)
857
+{
858
+}
859
+
860
+static inline void vc4_debugfs_add_regset32(struct drm_device *drm,
861
+					    const char *filename,
862
+					    struct debugfs_regset32 *regset)
863
+{
864
+}
865
+#endif
707866 
708867 /* vc4_drv.c */
709868 void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index);
710869 
711870 /* vc4_dpi.c */
712871 extern struct platform_driver vc4_dpi_driver;
713
-int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused);
714872 
715873 /* vc4_dsi.c */
716874 extern struct platform_driver vc4_dsi_driver;
717
-int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused);
718875 
719876 /* vc4_fence.c */
720877 extern const struct dma_fence_ops vc4_fence_ops;
721878 
722879 /* vc4_gem.c */
723
-void vc4_gem_init(struct drm_device *dev);
724
-void vc4_gem_destroy(struct drm_device *dev);
880
+int vc4_gem_init(struct drm_device *dev);
725881 int vc4_submit_cl_ioctl(struct drm_device *dev, void *data,
726882 			struct drm_file *file_priv);
727883 int vc4_wait_seqno_ioctl(struct drm_device *dev, void *data,
....@@ -742,15 +898,12 @@
742898 
743899 /* vc4_hdmi.c */
744900 extern struct platform_driver vc4_hdmi_driver;
745
-int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused);
746901 
747902 /* vc4_vec.c */
748903 extern struct platform_driver vc4_vec_driver;
749
-int vc4_vec_debugfs_regs(struct seq_file *m, void *unused);
750904 
751905 /* vc4_txp.c */
752906 extern struct platform_driver vc4_txp_driver;
753
-int vc4_txp_debugfs_regs(struct seq_file *m, void *unused);
754907 
755908 /* vc4_irq.c */
756909 irqreturn_t vc4_irq(int irq, void *arg);
....@@ -761,8 +914,15 @@
761914 
762915 /* vc4_hvs.c */
763916 extern struct platform_driver vc4_hvs_driver;
917
+void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int output);
918
+int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output);
919
+int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
920
+void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
921
+void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
922
+void vc4_hvs_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *state);
764923 void vc4_hvs_dump_state(struct drm_device *dev);
765
-int vc4_hvs_debugfs_regs(struct seq_file *m, void *unused);
924
+void vc4_hvs_unmask_underrun(struct drm_device *dev, int channel);
925
+void vc4_hvs_mask_underrun(struct drm_device *dev, int channel);
766926 
767927 /* vc4_kms.c */
768928 int vc4_kms_load(struct drm_device *dev);
....@@ -770,6 +930,7 @@
770930 /* vc4_plane.c */
771931 struct drm_plane *vc4_plane_init(struct drm_device *dev,
772932 				 enum drm_plane_type type);
933
+int vc4_plane_create_additional_planes(struct drm_device *dev);
773934 u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
774935 u32 vc4_plane_dlist_size(const struct drm_plane_state *state);
775936 void vc4_plane_async_set_fb(struct drm_plane *plane,
....@@ -777,9 +938,12 @@
777938 
778939 /* vc4_v3d.c */
779940 extern struct platform_driver vc4_v3d_driver;
780
-int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);
781
-int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);
941
+extern const struct of_device_id vc4_v3d_dt_match[];
782942 int vc4_v3d_get_bin_slot(struct vc4_dev *vc4);
943
+int vc4_v3d_bin_bo_get(struct vc4_dev *vc4, bool *used);
944
+void vc4_v3d_bin_bo_put(struct vc4_dev *vc4);
945
+int vc4_v3d_pm_get(struct vc4_dev *vc4);
946
+void vc4_v3d_pm_put(struct vc4_dev *vc4);
783947 
784948 /* vc4_validate.c */
785949 int
....@@ -820,3 +984,5 @@
820984 			      struct drm_file *file_priv);
821985 int vc4_perfmon_get_values_ioctl(struct drm_device *dev, void *data,
822986 				 struct drm_file *file_priv);
987
+
988
+#endif /* _VC4_DRV_H_ */