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2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
34  *
....@@ -6,31 +7,30 @@
67  *   Copyright (C) 2015 NextThing Co
78  *
89  *   Maxime Ripard <maxime.ripard@free-electrons.com>
9
- *
10
- * This program is free software; you can redistribute it and/or
11
- * modify it under the terms of the GNU General Public License as
12
- * published by the Free Software Foundation; either version 2 of
13
- * the License, or (at your option) any later version.
1410  */
1511 
1612 #include <drm/drm_atomic.h>
1713 #include <drm/drm_atomic_helper.h>
1814 #include <drm/drm_crtc.h>
19
-#include <drm/drm_crtc_helper.h>
2015 #include <drm/drm_fb_cma_helper.h>
16
+#include <drm/drm_fourcc.h>
2117 #include <drm/drm_gem_cma_helper.h>
18
+#include <drm/drm_gem_framebuffer_helper.h>
2219 #include <drm/drm_plane_helper.h>
23
-#include <drm/drmP.h>
20
+#include <drm/drm_probe_helper.h>
2421 
25
-#include "sun8i_ui_layer.h"
2622 #include "sun8i_mixer.h"
23
+#include "sun8i_ui_layer.h"
2724 #include "sun8i_ui_scaler.h"
2825 
2926 static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
3027 				  int overlay, bool enable, unsigned int zpos,
3128 				  unsigned int old_zpos)
3229 {
33
-	u32 val;
30
+	u32 val, bld_base, ch_base;
31
+
32
+	bld_base = sun8i_blender_base(mixer);
33
+	ch_base = sun8i_channel_base(mixer, channel);
3434 
3535 	DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n",
3636 			 enable ? "En" : "Dis", channel, overlay);
....@@ -41,17 +41,17 @@
4141 		val = 0;
4242 
4343 	regmap_update_bits(mixer->engine.regs,
44
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(channel, overlay),
44
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
4545 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val);
4646 
4747 	if (!enable || zpos != old_zpos) {
4848 		regmap_update_bits(mixer->engine.regs,
49
-				   SUN8I_MIXER_BLEND_PIPE_CTL,
49
+				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
5050 				   SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos),
5151 				   0);
5252 
5353 		regmap_update_bits(mixer->engine.regs,
54
-				   SUN8I_MIXER_BLEND_ROUTE,
54
+				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
5555 				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos),
5656 				   0);
5757 	}
....@@ -60,12 +60,13 @@
6060 		val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
6161 
6262 		regmap_update_bits(mixer->engine.regs,
63
-				   SUN8I_MIXER_BLEND_PIPE_CTL, val, val);
63
+				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
64
+				   val, val);
6465 
6566 		val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
6667 
6768 		regmap_update_bits(mixer->engine.regs,
68
-				   SUN8I_MIXER_BLEND_ROUTE,
69
+				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
6970 				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
7071 				   val);
7172 	}
....@@ -77,11 +78,15 @@
7778 {
7879 	struct drm_plane_state *state = plane->state;
7980 	u32 src_w, src_h, dst_w, dst_h;
81
+	u32 bld_base, ch_base;
8082 	u32 outsize, insize;
8183 	u32 hphase, vphase;
8284 
8385 	DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
8486 			 channel, overlay);
87
+
88
+	bld_base = sun8i_blender_base(mixer);
89
+	ch_base = sun8i_channel_base(mixer, channel);
8590 
8691 	src_w = drm_rect_width(&state->src) >> 16;
8792 	src_h = drm_rect_height(&state->src) >> 16;
....@@ -103,8 +108,8 @@
103108 		regmap_write(mixer->engine.regs,
104109 			     SUN8I_MIXER_GLOBAL_SIZE,
105110 			     outsize);
106
-		regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTSIZE,
107
-			     outsize);
111
+		regmap_write(mixer->engine.regs,
112
+			     SUN8I_MIXER_BLEND_OUTSIZE(bld_base), outsize);
108113 
109114 		if (state->crtc)
110115 			interlaced = state->crtc->state->adjusted_mode.flags
....@@ -116,7 +121,7 @@
116121 			val = 0;
117122 
118123 		regmap_update_bits(mixer->engine.regs,
119
-				   SUN8I_MIXER_BLEND_OUTCTL,
124
+				   SUN8I_MIXER_BLEND_OUTCTL(bld_base),
120125 				   SUN8I_MIXER_BLEND_OUTCTL_INTERLACED,
121126 				   val);
122127 
....@@ -129,10 +134,10 @@
129134 			 state->src.x1 >> 16, state->src.y1 >> 16);
130135 	DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
131136 	regmap_write(mixer->engine.regs,
132
-		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(channel, overlay),
137
+		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, overlay),
133138 		     insize);
134139 	regmap_write(mixer->engine.regs,
135
-		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(channel),
140
+		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base),
136141 		     insize);
137142 
138143 	if (insize != outsize || hphase || vphase) {
....@@ -156,10 +161,10 @@
156161 			 state->dst.x1, state->dst.y1);
157162 	DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
158163 	regmap_write(mixer->engine.regs,
159
-		     SUN8I_MIXER_BLEND_ATTR_COORD(zpos),
164
+		     SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos),
160165 		     SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
161166 	regmap_write(mixer->engine.regs,
162
-		     SUN8I_MIXER_BLEND_ATTR_INSIZE(zpos),
167
+		     SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos),
163168 		     outsize);
164169 
165170 	return 0;
....@@ -169,18 +174,22 @@
169174 					 int overlay, struct drm_plane *plane)
170175 {
171176 	struct drm_plane_state *state = plane->state;
172
-	const struct de2_fmt_info *fmt_info;
173
-	u32 val;
177
+	const struct drm_format_info *fmt;
178
+	u32 val, ch_base, hw_fmt;
179
+	int ret;
174180 
175
-	fmt_info = sun8i_mixer_format_info(state->fb->format->format);
176
-	if (!fmt_info || !fmt_info->rgb) {
181
+	ch_base = sun8i_channel_base(mixer, channel);
182
+
183
+	fmt = state->fb->format;
184
+	ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
185
+	if (ret || fmt->is_yuv) {
177186 		DRM_DEBUG_DRIVER("Invalid format\n");
178187 		return -EINVAL;
179188 	}
180189 
181
-	val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
190
+	val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
182191 	regmap_update_bits(mixer->engine.regs,
183
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(channel, overlay),
192
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
184193 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
185194 
186195 	return 0;
....@@ -193,7 +202,10 @@
193202 	struct drm_framebuffer *fb = state->fb;
194203 	struct drm_gem_cma_object *gem;
195204 	dma_addr_t paddr;
205
+	u32 ch_base;
196206 	int bpp;
207
+
208
+	ch_base = sun8i_channel_base(mixer, channel);
197209 
198210 	/* Get the physical address of the buffer in memory */
199211 	gem = drm_fb_cma_get_gem_obj(fb, 0);
....@@ -211,13 +223,13 @@
211223 	/* Set the line width */
212224 	DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
213225 	regmap_write(mixer->engine.regs,
214
-		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(channel, overlay),
226
+		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay),
215227 		     fb->pitches[0]);
216228 
217229 	DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
218230 
219231 	regmap_write(mixer->engine.regs,
220
-		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(channel, overlay),
232
+		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay),
221233 		     lower_32_bits(paddr));
222234 
223235 	return 0;
....@@ -286,7 +298,8 @@
286298 			      true, zpos, old_zpos);
287299 }
288300 
289
-static struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
301
+static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
302
+	.prepare_fb	= drm_gem_fb_prepare_fb,
290303 	.atomic_check	= sun8i_ui_layer_atomic_check,
291304 	.atomic_disable	= sun8i_ui_layer_atomic_disable,
292305 	.atomic_update	= sun8i_ui_layer_atomic_update,