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2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
....@@ -1,21 +1,16 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
34  * Author:Mark Yao <mark.yao@rock-chips.com>
4
- *
5
- * This software is licensed under the terms of the GNU General Public
6
- * License version 2, as published by the Free Software Foundation, and
7
- * may be copied, distributed, and modified under those terms.
8
- *
9
- * This program is distributed in the hope that it will be useful,
10
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
- * GNU General Public License for more details.
135  */
146 
15
-#include <drm/drmP.h>
16
-
17
-#include <linux/kernel.h>
187 #include <linux/component.h>
8
+#include <linux/kernel.h>
9
+#include <linux/of.h>
10
+#include <linux/platform_device.h>
11
+
12
+#include <drm/drm_fourcc.h>
13
+#include <drm/drm_print.h>
1914 
2015 #include "rockchip_drm_vop.h"
2116 #include "rockchip_vop_reg.h"
....@@ -67,9 +62,11 @@
6762 	DRM_FORMAT_NV12,
6863 	DRM_FORMAT_NV16,
6964 	DRM_FORMAT_NV24,
70
-	DRM_FORMAT_NV12_10,
71
-	DRM_FORMAT_NV16_10,
72
-	DRM_FORMAT_NV24_10,
65
+	DRM_FORMAT_NV15, /* yuv420_10bit linear mode, 2 plane, no padding */
66
+#ifdef CONFIG_NO_GKI
67
+	DRM_FORMAT_NV20, /* yuv422_10bit linear mode, 2 plane, no padding */
68
+	DRM_FORMAT_NV30, /* yuv444_10bit linear mode, 2 plane, no padding */
69
+#endif
7370 };
7471 
7572 static const uint32_t formats_win_full_10bit_yuyv[] = {
....@@ -81,13 +78,18 @@
8178 	DRM_FORMAT_BGR888,
8279 	DRM_FORMAT_RGB565,
8380 	DRM_FORMAT_BGR565,
84
-	DRM_FORMAT_NV12,
85
-	DRM_FORMAT_NV16,
86
-	DRM_FORMAT_NV24,
87
-	DRM_FORMAT_NV12_10,
88
-	DRM_FORMAT_NV16_10,
89
-	DRM_FORMAT_NV24_10,
90
-	DRM_FORMAT_YUYV,
81
+	DRM_FORMAT_NV12, /* yuv420_8bit linear mode, 2 plane */
82
+	DRM_FORMAT_NV16, /* yuv422_8bit linear mode, 2 plane */
83
+	DRM_FORMAT_NV24, /* yuv444_8bit linear mode, 2 plane */
84
+	DRM_FORMAT_NV15, /* yuv420_10bit linear mode, 2 plane, no padding */
85
+#ifdef CONFIG_NO_GKI
86
+	DRM_FORMAT_NV20, /* yuv422_10bit linear mode, 2 plane, no padding */
87
+	DRM_FORMAT_NV30, /* yuv444_10bit linear mode, 2 plane, no padding */
88
+#endif
89
+	DRM_FORMAT_YVYU, /* yuv422_8bit[YVYU] linear mode or non-Linear mode */
90
+	DRM_FORMAT_VYUY, /* yuv422_8bit[VYUY] linear mode or non-Linear mode */
91
+	DRM_FORMAT_YUYV, /* yuv422_8bit[YUYV] linear mode or non-Linear mode */
92
+	DRM_FORMAT_UYVY, /* yuv422_8bit[UYVY] linear mode or non-Linear mode */
9193 };
9294 
9395 static const uint32_t formats_win_lite[] = {
....@@ -99,6 +101,50 @@
99101 	DRM_FORMAT_BGR888,
100102 	DRM_FORMAT_RGB565,
101103 	DRM_FORMAT_BGR565,
104
+};
105
+
106
+static const uint64_t format_modifiers[] = {
107
+	DRM_FORMAT_MOD_LINEAR,
108
+	DRM_FORMAT_MOD_INVALID,
109
+};
110
+
111
+static const uint64_t format_modifiers_afbc[] = {
112
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16),
113
+
114
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
115
+				AFBC_FORMAT_MOD_SPARSE),
116
+
117
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
118
+				AFBC_FORMAT_MOD_YTR),
119
+
120
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
121
+				AFBC_FORMAT_MOD_CBR),
122
+
123
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
124
+				AFBC_FORMAT_MOD_YTR |
125
+				AFBC_FORMAT_MOD_SPARSE),
126
+
127
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
128
+				AFBC_FORMAT_MOD_CBR |
129
+				AFBC_FORMAT_MOD_SPARSE),
130
+
131
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
132
+				AFBC_FORMAT_MOD_YTR |
133
+				AFBC_FORMAT_MOD_CBR),
134
+
135
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
136
+				AFBC_FORMAT_MOD_YTR |
137
+				AFBC_FORMAT_MOD_CBR |
138
+				AFBC_FORMAT_MOD_SPARSE),
139
+
140
+	/* SPLIT mandates SPARSE, RGB modes mandates YTR */
141
+	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
142
+				AFBC_FORMAT_MOD_YTR |
143
+				AFBC_FORMAT_MOD_SPARSE |
144
+				AFBC_FORMAT_MOD_SPLIT),
145
+
146
+	DRM_FORMAT_MOD_LINEAR,
147
+	DRM_FORMAT_MOD_INVALID,
102148 };
103149 
104150 static const struct vop_scl_extension rk3288_win_full_scl_ext = {
....@@ -139,7 +185,7 @@
139185 	.nformats = ARRAY_SIZE(formats_win_full_10bit),
140186 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
141187 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
142
-	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 4),
188
+	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
143189 	.csc_mode = VOP_REG_VER(RK3288_WIN0_CTRL0, 0x3, 10, 3, 2, -1),
144190 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
145191 	.xmirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 21, 3, 2, -1),
....@@ -265,6 +311,11 @@
265311 
266312 	.dsp_out_yuv = VOP_REG_VER(RK3399_POST_SCL_CTRL, 0x1, 2, 3, 5, -1),
267313 	.dsp_data_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1f, 12),
314
+	.dsp_bg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 12),
315
+	.dsp_rb_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 13),
316
+	.dsp_rg_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 14),
317
+	.dsp_delta_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 15),
318
+	.dsp_dummy_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1, 16),
268319 	.dsp_ccir656_avg = VOP_REG(RK3288_DSP_CTRL0, 0x1, 20),
269320 	.dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
270321 	.update_gamma_lut = VOP_REG_VER(RK3288_DSP_CTRL1, 0x1, 7, 3, 5, -1),
....@@ -349,8 +400,10 @@
349400 };
350401 
351402 static const struct vop_data rk3288_vop_big = {
403
+	.soc_id = 0x3288,
404
+	.vop_id = 0,
352405 	.version = VOP_VERSION(3, 0),
353
-	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE,
406
+	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
354407 	.max_input = {4096, 8192},
355408 	.max_output = {3840, 2160},
356409 	.intr = &rk3288_vop_intr,
....@@ -361,8 +414,10 @@
361414 };
362415 
363416 static const struct vop_data rk3288_vop_lit = {
417
+	.soc_id = 0x3288,
418
+	.vop_id = 1,
364419 	.version = VOP_VERSION(3, 0),
365
-	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE,
420
+	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
366421 	.max_input = {4096, 8192},
367422 	.max_output = {2560, 1600},
368423 	.intr = &rk3288_vop_intr,
....@@ -470,8 +525,10 @@
470525 };
471526 
472527 static const struct vop_data rk3368_vop = {
528
+	.soc_id = 0x3368,
529
+	.vop_id = 0,
473530 	.version = VOP_VERSION(3, 2),
474
-	.feature = VOP_FEATURE_ALPHA_SCALE,
531
+	.feature = VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
475532 	.max_input = {4096, 8192},
476533 	.max_output = {4096, 2160},
477534 	.intr = &rk3368_vop_intr,
....@@ -495,8 +552,10 @@
495552 };
496553 
497554 static const struct vop_data rk3366_vop = {
555
+	.soc_id = 0x3366,
556
+	.vop_id = 0,
498557 	.version = VOP_VERSION(3, 4),
499
-	.feature = VOP_FEATURE_ALPHA_SCALE,
558
+	.feature = VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
500559 	.max_input = {4096, 8192},
501560 	.max_output = {4096, 2160},
502561 	.intr = &rk3366_vop_intr,
....@@ -610,7 +669,7 @@
610669 	.nformats = ARRAY_SIZE(formats_win_full_10bit_yuyv),
611670 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
612671 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
613
-	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 4),
672
+	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
614673 	.fmt_yuyv = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 17),
615674 	.csc_mode = VOP_REG_VER(RK3288_WIN0_CTRL0, 0x3, 10, 3, 2, -1),
616675 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
....@@ -633,17 +692,21 @@
633692 
634693 static const struct vop_win_data rk3399_vop_win_data[] = {
635694 	{ .base = 0x00, .phy = &rk3399_win01_data, .csc = &rk3399_win0_csc,
695
+	  .format_modifiers = format_modifiers_afbc,
636696 	  .type = DRM_PLANE_TYPE_PRIMARY,
637697 	  .feature = WIN_FEATURE_AFBDC },
638698 	{ .base = 0x40, .phy = &rk3399_win01_data, .csc = &rk3399_win1_csc,
699
+	  .format_modifiers = format_modifiers_afbc,
639700 	  .type = DRM_PLANE_TYPE_OVERLAY,
640701 	  .feature = WIN_FEATURE_AFBDC },
641702 	{ .base = 0x00, .phy = &rk3368_win23_data, .csc = &rk3399_win2_csc,
703
+	  .format_modifiers = format_modifiers_afbc,
642704 	  .type = DRM_PLANE_TYPE_OVERLAY,
643705 	  .feature = WIN_FEATURE_AFBDC,
644706 	  .area = rk3368_area_data,
645707 	  .area_size = ARRAY_SIZE(rk3368_area_data), },
646708 	{ .base = 0x50, .phy = &rk3368_win23_data, .csc = &rk3399_win3_csc,
709
+	  .format_modifiers = format_modifiers_afbc,
647710 	  .type = DRM_PLANE_TYPE_CURSOR,
648711 	  .feature = WIN_FEATURE_AFBDC,
649712 	  .area = rk3368_area_data,
....@@ -651,10 +714,11 @@
651714 };
652715 
653716 static const struct vop_data rk3399_vop_big = {
717
+	.soc_id = 0x3399,
718
+	.vop_id = 0,
654719 	.version = VOP_VERSION(3, 5),
655720 	.csc_table = &rk3399_csc_table,
656
-	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_AFBDC |
657
-			VOP_FEATURE_ALPHA_SCALE,
721
+	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
658722 	.max_input = {4096, 8192},
659723 	.max_output = {4096, 2160},
660724 	.intr = &rk3366_vop_intr,
....@@ -665,10 +729,12 @@
665729 
666730 static const struct vop_win_data rk3399_vop_lit_win_data[] = {
667731 	{ .base = 0x00, .phy = &rk3399_win01_data, .csc = &rk3399_win0_csc,
732
+	  .format_modifiers = format_modifiers,
668733 	  .type = DRM_PLANE_TYPE_OVERLAY,
669734 	  .feature = WIN_FEATURE_AFBDC },
670735 	{ .phy = NULL },
671736 	{ .base = 0x00, .phy = &rk3368_win23_data, .csc = &rk3399_win2_csc,
737
+	  .format_modifiers = format_modifiers,
672738 	  .type = DRM_PLANE_TYPE_PRIMARY,
673739 	  .feature = WIN_FEATURE_AFBDC,
674740 	  .area = rk3368_area_data,
....@@ -678,8 +744,10 @@
678744 
679745 
680746 static const struct vop_data rk3399_vop_lit = {
747
+	.soc_id = 0x3399,
748
+	.vop_id = 1,
681749 	.version = VOP_VERSION(3, 6),
682
-	.feature = VOP_FEATURE_ALPHA_SCALE,
750
+	.feature = VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
683751 	.csc_table = &rk3399_csc_table,
684752 	.max_input = {4096, 8192},
685753 	.max_output = {2560, 1600},
....@@ -697,8 +765,10 @@
697765 };
698766 
699767 static const struct vop_data rk3228_vop = {
768
+	.soc_id = 0x3228,
769
+	.vop_id = 0,
700770 	.version = VOP_VERSION(3, 7),
701
-	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE,
771
+	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
702772 	.max_input = {4096, 8192},
703773 	.max_output = {4096, 2160},
704774 	.intr = &rk3366_vop_intr,
....@@ -999,6 +1069,11 @@
9991069 	.dither_up_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
10001070 
10011071 	.dsp_data_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1f, 12),
1072
+	.dsp_bg_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1, 12),
1073
+	.dsp_rb_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1, 13),
1074
+	.dsp_rg_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1, 14),
1075
+	.dsp_delta_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1, 15),
1076
+	.dsp_dummy_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1, 16),
10021077 	.dsp_ccir656_avg = VOP_REG(RK3328_DSP_CTRL0, 0x1, 20),
10031078 	.dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
10041079 	.dsp_lut_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 0),
....@@ -1088,8 +1163,11 @@
10881163 };
10891164 
10901165 static const struct vop_data rk3328_vop = {
1166
+	.soc_id = 0x3328,
1167
+	.vop_id = 0,
10911168 	.version = VOP_VERSION(3, 8),
1092
-	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE,
1169
+	.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_HDR10 |
1170
+			VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_OVERSCAN,
10931171 	.hdr_table = &rk3328_hdr_table,
10941172 	.max_input = {4096, 8192},
10951173 	.max_output = {4096, 2160},
....@@ -1171,19 +1249,27 @@
11711249 
11721250 static const struct vop_ctrl rk3036_ctrl_data = {
11731251 	.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
1252
+	.sw_dac_sel = VOP_REG(RK3036_SYS_CTRL, 0x1, 29),
11741253 	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
1254
+	.dsp_interlace = VOP_REG(RK3036_DSP_CTRL0, 0x1, 12),
11751255 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
1256
+	.dsp_background = VOP_REG(RK3036_DSP_CTRL1, 0xffffff, 0),
11761257 	.dclk_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 7),
11771258 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0x7, 4),
11781259 	.dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27),
1260
+	.tve_sw_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 25),
1261
+	.dsp_interlace_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 13),
11791262 	.dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11),
11801263 	.dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10),
11811264 	.dither_up_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 9),
11821265 	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
11831266 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
11841267 	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
1268
+	.tve_dclk_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 20),
1269
+	.tve_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 21),
11851270 	.hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22),
11861271 	.hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23),
1272
+	.core_dclk_div = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 30),
11871273 	.hdmi_pin_pol = VOP_REG(RK3036_INT_SCALER, 0x7, 4),
11881274 	.rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24),
11891275 	.rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25),
....@@ -1193,10 +1279,14 @@
11931279 	.mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29),
11941280 	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
11951281 	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
1282
+	.vs_st_end_f1 = VOP_REG(RK3036_DSP_VS_ST_END_F1, 0x1fff1fff, 0),
1283
+	.vact_st_end_f1 = VOP_REG(RK3036_DSP_VACT_ST_END_F1, 0x1fff1fff, 0),
11961284 	.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
11971285 };
11981286 
11991287 static const struct vop_data rk3036_vop = {
1288
+	.soc_id = 0x3036,
1289
+	.vop_id = 0,
12001290 	.version = VOP_VERSION(2, 2),
12011291 	.max_input = {1920, 1080},
12021292 	.max_output = {1920, 1080},
....@@ -1303,6 +1393,8 @@
13031393 };
13041394 
13051395 static const struct vop_data rk3066_vop = {
1396
+	.soc_id = 0x3066,
1397
+	.vop_id = 0,
13061398 	.version = VOP_VERSION(2, 1),
13071399 	.max_input = {1920, 4096},
13081400 	.max_output = {1920, 1080},
....@@ -1341,6 +1433,7 @@
13411433 
13421434 	.enable = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 0),
13431435 	.format = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x7, 1),
1436
+	.interlace_read = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 8),
13441437 	.rb_swap = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 12),
13451438 	.act_info = VOP_REG(RK3366_LIT_WIN0_ACT_INFO, 0xffffffff, 0),
13461439 	.dsp_info = VOP_REG(RK3366_LIT_WIN0_DSP_INFO, 0xffffffff, 0),
....@@ -1365,6 +1458,7 @@
13651458 
13661459 	.enable = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 0),
13671460 	.format = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x7, 4),
1461
+	.interlace_read = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 8),
13681462 	.rb_swap = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 12),
13691463 	.dsp_info = VOP_REG(RK3366_LIT_WIN1_DSP_INFO, 0xffffffff, 0),
13701464 	.dsp_st = VOP_REG(RK3366_LIT_WIN1_DSP_ST, 0xffffffff, 0),
....@@ -1420,6 +1514,8 @@
14201514 };
14211515 
14221516 static const struct vop_data rk3126_vop = {
1517
+	.soc_id = 0x3126,
1518
+	.vop_id = 0,
14231519 	.version = VOP_VERSION(2, 4),
14241520 	.max_input = {1920, 8192},
14251521 	.max_output = {1920, 1080},
....@@ -1468,6 +1564,9 @@
14681564 	.dither_down_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 6),
14691565 	.dither_up_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
14701566 	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
1567
+	.dsp_bg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 9),
1568
+	.dsp_rb_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11),
1569
+	.dsp_rg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 12),
14711570 	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
14721571 	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
14731572 	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
....@@ -1557,6 +1656,8 @@
15571656 };
15581657 
15591658 static const struct vop_data px30_vop_lit = {
1659
+	.soc_id = 0x3326,
1660
+	.vop_id = 1,
15601661 	.version = VOP_VERSION(2, 5),
15611662 	.max_input = {1920, 8192},
15621663 	.max_output = {1920, 1080},
....@@ -1568,8 +1669,9 @@
15681669 };
15691670 
15701671 static const struct vop_data px30_vop_big = {
1672
+	.soc_id = 0x3326,
1673
+	.vop_id = 0,
15711674 	.version = VOP_VERSION(2, 6),
1572
-	.feature = VOP_FEATURE_AFBDC,
15731675 	.max_input = {1920, 8192},
15741676 	.max_output = {1920, 1080},
15751677 	.ctrl = &px30_ctrl_data,
....@@ -1602,6 +1704,9 @@
16021704 	.dither_down_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 6),
16031705 	.dither_up_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
16041706 	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
1707
+	.dsp_bg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 9),
1708
+	.dsp_rb_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11),
1709
+	.dsp_rg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 12),
16051710 	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
16061711 	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
16071712 	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
....@@ -1665,6 +1770,8 @@
16651770 };
16661771 
16671772 static const struct vop_data rk3308_vop = {
1773
+	.soc_id = 0x3308,
1774
+	.vop_id = 0,
16681775 	.version = VOP_VERSION(2, 7),
16691776 	.max_input = {1920, 8192},
16701777 	.max_output = {1920, 1080},
....@@ -1708,6 +1815,9 @@
17081815 	.dither_down_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 6),
17091816 	.dither_up_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
17101817 	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
1818
+	.dsp_bg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 9),
1819
+	.dsp_rb_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11),
1820
+	.dsp_rg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 12),
17111821 	.yuv_clip = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 4),
17121822 	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
17131823 	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
....@@ -1763,6 +1873,8 @@
17631873 };
17641874 
17651875 static const struct vop_data rv1126_vop = {
1876
+	.soc_id = 0x1126,
1877
+	.vop_id = 0,
17661878 	.version = VOP_VERSION(2, 0xb),
17671879 	.max_input = {1920, 1920},
17681880 	.max_output = {1920, 1080},
....@@ -1771,6 +1883,93 @@
17711883 	.grf_ctrl = &rv1126_grf_ctrl,
17721884 	.win = rv1126_vop_win_data,
17731885 	.win_size = ARRAY_SIZE(rv1126_vop_win_data),
1886
+};
1887
+
1888
+static const struct vop_ctrl rv1106_ctrl_data = {
1889
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
1890
+	.axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16),
1891
+	.axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12),
1892
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
1893
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
1894
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
1895
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
1896
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
1897
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
1898
+	.dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0),
1899
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
1900
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
1901
+	.core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
1902
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
1903
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
1904
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
1905
+	.dither_down_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 8),
1906
+	.dither_down_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 7),
1907
+	.dither_down_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 6),
1908
+	.dither_up_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
1909
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
1910
+	.dsp_bg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 9),
1911
+	.dsp_rb_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11),
1912
+	.dsp_rg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 12),
1913
+	.yuv_clip = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 4),
1914
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
1915
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
1916
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
1917
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
1918
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
1919
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
1920
+
1921
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
1922
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
1923
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
1924
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
1925
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
1926
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
1927
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
1928
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
1929
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
1930
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
1931
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
1932
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
1933
+
1934
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
1935
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
1936
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
1937
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
1938
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
1939
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
1940
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
1941
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
1942
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
1943
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
1944
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
1945
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
1946
+				      0xffffffff, 0),
1947
+	.bt1120_yc_swap = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 30),
1948
+	.bt1120_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 31),
1949
+	.bt656_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 6),
1950
+};
1951
+
1952
+static const struct vop_win_data rv1106_vop_win_data[] = {
1953
+	{ .phy = NULL },
1954
+	{ .base = 0x00, .phy = &rk3366_lit_win1_data,
1955
+	  .type = DRM_PLANE_TYPE_PRIMARY },
1956
+};
1957
+
1958
+static const struct vop_grf_ctrl rv1106_grf_ctrl = {
1959
+	.grf_dclk_inv = VOP_REG(RV1106_VENC_GRF_VOP_IO_WRAPPER, 0x1, 2),
1960
+};
1961
+
1962
+static const struct vop_data rv1106_vop = {
1963
+	.soc_id = 0x1106,
1964
+	.vop_id = 0,
1965
+	.version = VOP_VERSION(2, 0xc),
1966
+	.max_input = {1280, 1280},
1967
+	.max_output = {1280, 1280},
1968
+	.ctrl = &rv1106_ctrl_data,
1969
+	.intr = &rk3366_lit_intr,
1970
+	.grf_ctrl = &rv1106_grf_ctrl,
1971
+	.win = rv1106_vop_win_data,
1972
+	.win_size = ARRAY_SIZE(rv1106_vop_win_data),
17741973 };
17751974 
17761975 static const struct of_device_id vop_driver_dt_match[] = {
....@@ -1796,6 +1995,10 @@
17961995 	{ .compatible = "rockchip,rk3308-vop",
17971996 	  .data = &rk3308_vop },
17981997 #endif
1998
+#if IS_ENABLED(CONFIG_CPU_RV1106)
1999
+	{ .compatible = "rockchip,rv1106-vop",
2000
+	  .data = &rv1106_vop },
2001
+#endif
17992002 #if IS_ENABLED(CONFIG_CPU_RV1126)
18002003 	{ .compatible = "rockchip,rv1126-vop",
18012004 	  .data = &rv1126_vop },