disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
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@@ -107,6 +107,12 @@
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 	ROCKCHIP_COLOR_BAR_VERTICAL = 2,
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 };
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+enum rockchip_drm_split_area {
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+	ROCKCHIP_DRM_SPLIT_UNSET = 0,
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+	ROCKCHIP_DRM_SPLIT_LEFT_SIDE = 1,
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+	ROCKCHIP_DRM_SPLIT_RIGHT_SIDE = 2,
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+};
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+
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 struct rockchip_drm_sub_dev {
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 	struct list_head list;
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 	struct drm_connector *connector;
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@@ -184,6 +190,37 @@
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 	u16 target_bits_per_pixel_x16;
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 };
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192
 
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+#define ACM_GAIN_LUT_HY_LENGTH		(9*17)
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+#define ACM_GAIN_LUT_HY_TOTAL_LENGTH	(ACM_GAIN_LUT_HY_LENGTH * 3)
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+#define ACM_GAIN_LUT_HS_LENGTH		(13*17)
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+#define ACM_GAIN_LUT_HS_TOTAL_LENGTH	(ACM_GAIN_LUT_HS_LENGTH * 3)
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+#define ACM_DELTA_LUT_H_LENGTH		65
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+#define ACM_DELTA_LUT_H_TOTAL_LENGTH	(ACM_DELTA_LUT_H_LENGTH * 3)
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+
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+struct post_acm {
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+	s16 delta_lut_h[ACM_DELTA_LUT_H_TOTAL_LENGTH];
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+	s16 gain_lut_hy[ACM_GAIN_LUT_HY_TOTAL_LENGTH];
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+	s16 gain_lut_hs[ACM_GAIN_LUT_HS_TOTAL_LENGTH];
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+	u16 y_gain;
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+	u16 h_gain;
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+	u16 s_gain;
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+	u16 acm_enable;
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+};
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+
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+struct post_csc {
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+	u16 hue;
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+	u16 saturation;
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+	u16 contrast;
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+	u16 brightness;
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+	u16 r_gain;
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+	u16 g_gain;
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+	u16 b_gain;
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+	u16 r_offset;
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+	u16 g_offset;
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+	u16 b_offset;
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+	u16 csc_enable;
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+};
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+
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 struct rockchip_crtc_state {
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 	struct drm_crtc_state base;
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 	int vp_id;
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@@ -227,6 +264,7 @@
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 	int afbdc_win_yoffset;
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 	int dsp_layer_sel;
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 	u32 output_if;
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+	u32 output_if_left_panel;
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 	u32 bus_format;
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 	u32 bus_flags;
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 	int yuv_overlay;
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@@ -255,6 +293,7 @@
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 	struct drm_property_blob *hdr_ext_data;
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 	struct drm_property_blob *acm_lut_data;
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 	struct drm_property_blob *post_csc_data;
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+	struct drm_property_blob *cubic_lut_data;
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 	int request_refresh_rate;
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 	int max_refresh_rate;
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@@ -399,7 +438,7 @@
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  * @wait_vact_end: wait the last active line.
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  */
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 struct rockchip_crtc_funcs {
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-	int (*loader_protect)(struct drm_crtc *crtc, bool on);
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+	int (*loader_protect)(struct drm_crtc *crtc, bool on, void *data);
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 	int (*enable_vblank)(struct drm_crtc *crtc);
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 	void (*disable_vblank)(struct drm_crtc *crtc);
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 	size_t (*bandwidth)(struct drm_crtc *crtc,
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@@ -452,6 +491,8 @@
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 	struct drm_property *aclk_prop;
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 	struct drm_property *bg_prop;
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 	struct drm_property *line_flag_prop;
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+	struct drm_property *cubic_lut_prop;
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+	struct drm_property *cubic_lut_size_prop;
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 	/* private plane prop */
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 	struct drm_property *eotf_prop;
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@@ -461,6 +502,7 @@
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 	/* private connector prop */
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 	struct drm_property *connector_id_prop;
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+	struct drm_property *split_area_prop;
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 	const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC];
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508
 
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@@ -525,6 +567,7 @@
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 uint32_t rockchip_drm_of_find_possible_crtcs(struct drm_device *dev,
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 					     struct device_node *port);
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 uint32_t rockchip_drm_get_bpp(const struct drm_format_info *info);
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+uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format);
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 int rockchip_drm_get_yuv422_format(struct drm_connector *connector,
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 				   struct edid *edid);
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 int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
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@@ -533,6 +576,8 @@
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 int rockchip_drm_parse_next_hdr(struct next_hdr_sink_data *sink_data,
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 				const struct edid *edid);
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 int rockchip_drm_parse_colorimetry_data_block(u8 *colorimetry, const struct edid *edid);
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+long rockchip_drm_dclk_round_rate(u32 version, struct clk *dclk, unsigned long rate);
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+int rockchip_drm_dclk_set_rate(u32 version, struct clk *dclk, unsigned long rate);
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581
 
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 __printf(3, 4)
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 void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category,