disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/pl111/pl111_display.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved.
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  *
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@@ -6,24 +7,19 @@
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  * Copyright (c) 2006-2008 Intel Corporation
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  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
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  * Copyright (C) 2011 Texas Instruments
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- *
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- * This program is free software and is provided to you under the terms of the
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- * GNU General Public License version 2 as published by the Free Software
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- * Foundation, and any use by you of this program is subject to the terms of
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- * such GNU licence.
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- *
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  */
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-#include <linux/amba/clcd-regs.h>
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 #include <linux/clk.h>
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+#include <linux/delay.h>
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 #include <linux/version.h>
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 #include <linux/dma-buf.h>
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 #include <linux/of_graph.h>
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-#include <drm/drmP.h>
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+#include <drm/drm_fb_cma_helper.h>
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+#include <drm/drm_fourcc.h>
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 #include <drm/drm_gem_cma_helper.h>
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 #include <drm/drm_gem_framebuffer_helper.h>
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-#include <drm/drm_fb_cma_helper.h>
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+#include <drm/drm_vblank.h>
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 #include "pl111_drm.h"
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@@ -51,10 +47,10 @@
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 }
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 static enum drm_mode_status
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-pl111_mode_valid(struct drm_crtc *crtc,
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+pl111_mode_valid(struct drm_simple_display_pipe *pipe,
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 		 const struct drm_display_mode *mode)
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 {
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-	struct drm_device *drm = crtc->dev;
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+	struct drm_device *drm = pipe->crtc.dev;
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 	struct pl111_drm_dev_private *priv = drm->dev_private;
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 	u32 cpp = priv->variant->fb_bpp / 8;
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 	u64 bw;
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@@ -131,6 +127,7 @@
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 	struct drm_framebuffer *fb = plane->state->fb;
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 	struct drm_connector *connector = priv->connector;
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 	struct drm_bridge *bridge = priv->bridge;
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+	bool grayscale = false;
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 	u32 cntl;
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 	u32 ppl, hsw, hfp, hbp;
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 	u32 lpp, vsw, vfp, vbp;
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@@ -188,8 +185,22 @@
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 			tim2 |= TIM2_IOE;
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 		if (connector->display_info.bus_flags &
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-		    DRM_BUS_FLAG_PIXDATA_NEGEDGE)
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+		    DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
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 			tim2 |= TIM2_IPC;
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+
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+		if (connector->display_info.num_bus_formats == 1 &&
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+		    connector->display_info.bus_formats[0] ==
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+		    MEDIA_BUS_FMT_Y8_1X8)
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+			grayscale = true;
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+
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+		/*
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+		 * The AC pin bias frequency is set to max count when using
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+		 * grayscale so at least once in a while we will reverse
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+		 * polarity and get rid of any DC built up that could
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+		 * damage the display.
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+		 */
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+		if (grayscale)
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+			tim2 |= TIM2_ACB_MASK;
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 	}
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 	if (bridge) {
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@@ -221,8 +232,18 @@
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 	writel(0, priv->regs + CLCD_TIM3);
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-	/* Hard-code TFT panel */
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-	cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1);
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+	/*
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+	 * Detect grayscale bus format. We do not support a grayscale mode
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+	 * toward userspace, instead we expose an RGB24 buffer and then the
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+	 * hardware will activate its grayscaler to convert to the grayscale
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+	 * format.
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+	 */
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+	if (grayscale)
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+		cntl = CNTL_LCDEN | CNTL_LCDMONO8;
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+	else
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+		/* Else we assume TFT display */
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+		cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1);
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+
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 	/* On the ST Micro variant, assume all 24 bits are connected */
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 	if (priv->variant->st_bitmux_control)
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 		cntl |= CNTL_ST_CDWID_24;
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@@ -551,24 +572,7 @@
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 int pl111_display_init(struct drm_device *drm)
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 {
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 	struct pl111_drm_dev_private *priv = drm->dev_private;
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-	struct device *dev = drm->dev;
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-	struct device_node *endpoint;
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-	u32 tft_r0b0g0[3];
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 	int ret;
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-
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-	endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
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-	if (!endpoint)
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-		return -ENODEV;
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-
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-	if (of_property_read_u32_array(endpoint,
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-				       "arm,pl11x,tft-r0g0b0-pads",
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-				       tft_r0b0g0,
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-				       ARRAY_SIZE(tft_r0b0g0)) != 0) {
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-		dev_err(dev, "arm,pl11x,tft-r0g0b0-pads should be 3 ints\n");
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-		of_node_put(endpoint);
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-		return -ENOENT;
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-	}
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-	of_node_put(endpoint);
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 	ret = pl111_init_clock_divider(drm);
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 	if (ret)