| .. | .. |
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| 21 | 21 | */ |
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| 22 | 22 | #include "priv.h" |
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| 23 | 23 | |
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| 24 | | -#include <subdev/mmu.h> |
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| 24 | +#include <core/memory.h> |
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| 25 | +#include <subdev/mc.h> |
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| 25 | 26 | |
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| 26 | | -static void |
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| 27 | +#include <nvif/class.h> |
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| 28 | + |
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| 29 | +void |
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| 30 | +gp100_fault_buffer_intr(struct nvkm_fault_buffer *buffer, bool enable) |
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| 31 | +{ |
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| 32 | + struct nvkm_device *device = buffer->fault->subdev.device; |
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| 33 | + nvkm_mc_intr_mask(device, NVKM_SUBDEV_FAULT, enable); |
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| 34 | +} |
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| 35 | + |
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| 36 | +void |
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| 27 | 37 | gp100_fault_buffer_fini(struct nvkm_fault_buffer *buffer) |
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| 28 | 38 | { |
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| 29 | 39 | struct nvkm_device *device = buffer->fault->subdev.device; |
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| 30 | 40 | nvkm_mask(device, 0x002a70, 0x00000001, 0x00000000); |
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| 31 | 41 | } |
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| 32 | 42 | |
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| 33 | | -static void |
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| 43 | +void |
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| 34 | 44 | gp100_fault_buffer_init(struct nvkm_fault_buffer *buffer) |
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| 35 | 45 | { |
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| 36 | 46 | struct nvkm_device *device = buffer->fault->subdev.device; |
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| 37 | | - nvkm_wr32(device, 0x002a74, upper_32_bits(buffer->vma->addr)); |
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| 38 | | - nvkm_wr32(device, 0x002a70, lower_32_bits(buffer->vma->addr)); |
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| 47 | + nvkm_wr32(device, 0x002a74, upper_32_bits(buffer->addr)); |
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| 48 | + nvkm_wr32(device, 0x002a70, lower_32_bits(buffer->addr)); |
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| 39 | 49 | nvkm_mask(device, 0x002a70, 0x00000001, 0x00000001); |
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| 40 | 50 | } |
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| 41 | 51 | |
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| 42 | | -static u32 |
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| 43 | | -gp100_fault_buffer_entries(struct nvkm_fault_buffer *buffer) |
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| 52 | +u64 gp100_fault_buffer_pin(struct nvkm_fault_buffer *buffer) |
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| 44 | 53 | { |
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| 45 | | - return nvkm_rd32(buffer->fault->subdev.device, 0x002a78); |
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| 54 | + return nvkm_memory_bar2(buffer->mem); |
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| 46 | 55 | } |
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| 47 | 56 | |
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| 48 | | -static void |
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| 57 | +void |
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| 58 | +gp100_fault_buffer_info(struct nvkm_fault_buffer *buffer) |
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| 59 | +{ |
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| 60 | + buffer->entries = nvkm_rd32(buffer->fault->subdev.device, 0x002a78); |
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| 61 | + buffer->get = 0x002a7c; |
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| 62 | + buffer->put = 0x002a80; |
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| 63 | +} |
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| 64 | + |
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| 65 | +void |
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| 49 | 66 | gp100_fault_intr(struct nvkm_fault *fault) |
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| 50 | 67 | { |
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| 51 | 68 | nvkm_event_send(&fault->event, 1, 0, NULL, 0); |
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| .. | .. |
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| 56 | 73 | .intr = gp100_fault_intr, |
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| 57 | 74 | .buffer.nr = 1, |
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| 58 | 75 | .buffer.entry_size = 32, |
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| 59 | | - .buffer.entries = gp100_fault_buffer_entries, |
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| 76 | + .buffer.info = gp100_fault_buffer_info, |
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| 77 | + .buffer.pin = gp100_fault_buffer_pin, |
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| 60 | 78 | .buffer.init = gp100_fault_buffer_init, |
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| 61 | 79 | .buffer.fini = gp100_fault_buffer_fini, |
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| 80 | + .buffer.intr = gp100_fault_buffer_intr, |
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| 81 | + .user = { { 0, 0, MAXWELL_FAULT_BUFFER_A }, 0 }, |
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| 62 | 82 | }; |
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| 63 | 83 | |
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| 64 | 84 | int |
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