forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/drivers/gpu/drm/nouveau/nvkm/falcon/v1.c
....@@ -25,7 +25,7 @@
2525 #include <core/memory.h>
2626 #include <subdev/timer.h>
2727
28
-static void
28
+void
2929 nvkm_falcon_v1_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
3030 u32 size, u16 tag, u8 port, bool secure)
3131 {
....@@ -89,18 +89,17 @@
8989 }
9090 }
9191
92
-static const u32 EMEM_START_ADDR = 0x1000000;
93
-
94
-static void
92
+void
9593 nvkm_falcon_v1_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,
96
- u32 size, u8 port)
94
+ u32 size, u8 port)
9795 {
96
+ const struct nvkm_falcon_func *func = falcon->func;
9897 u8 rem = size % 4;
9998 int i;
10099
101
- if (start >= EMEM_START_ADDR && falcon->has_emem)
100
+ if (func->emem_addr && start >= func->emem_addr)
102101 return nvkm_falcon_v1_load_emem(falcon, data,
103
- start - EMEM_START_ADDR, size,
102
+ start - func->emem_addr, size,
104103 port);
105104
106105 size -= rem;
....@@ -148,15 +147,16 @@
148147 }
149148 }
150149
151
-static void
150
+void
152151 nvkm_falcon_v1_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size,
153152 u8 port, void *data)
154153 {
154
+ const struct nvkm_falcon_func *func = falcon->func;
155155 u8 rem = size % 4;
156156 int i;
157157
158
- if (start >= EMEM_START_ADDR && falcon->has_emem)
159
- return nvkm_falcon_v1_read_emem(falcon, start - EMEM_START_ADDR,
158
+ if (func->emem_addr && start >= func->emem_addr)
159
+ return nvkm_falcon_v1_read_emem(falcon, start - func->emem_addr,
160160 size, port, data);
161161
162162 size -= rem;
....@@ -179,30 +179,16 @@
179179 }
180180 }
181181
182
-static void
182
+void
183183 nvkm_falcon_v1_bind_context(struct nvkm_falcon *falcon, struct nvkm_memory *ctx)
184184 {
185
+ const u32 fbif = falcon->func->fbif;
185186 u32 inst_loc;
186
- u32 fbif;
187187
188188 /* disable instance block binding */
189189 if (ctx == NULL) {
190190 nvkm_falcon_wr32(falcon, 0x10c, 0x0);
191191 return;
192
- }
193
-
194
- switch (falcon->owner->index) {
195
- case NVKM_ENGINE_NVENC0:
196
- case NVKM_ENGINE_NVENC1:
197
- case NVKM_ENGINE_NVENC2:
198
- fbif = 0x800;
199
- break;
200
- case NVKM_SUBDEV_PMU:
201
- fbif = 0xe00;
202
- break;
203
- default:
204
- fbif = 0x600;
205
- break;
206192 }
207193
208194 nvkm_falcon_wr32(falcon, 0x10c, 0x1);
....@@ -235,13 +221,13 @@
235221 nvkm_falcon_mask(falcon, 0x0a4, 0x8, 0x8);
236222 }
237223
238
-static void
224
+void
239225 nvkm_falcon_v1_set_start_addr(struct nvkm_falcon *falcon, u32 start_addr)
240226 {
241227 nvkm_falcon_wr32(falcon, 0x104, start_addr);
242228 }
243229
244
-static void
230
+void
245231 nvkm_falcon_v1_start(struct nvkm_falcon *falcon)
246232 {
247233 u32 reg = nvkm_falcon_rd32(falcon, 0x100);
....@@ -252,7 +238,7 @@
252238 nvkm_falcon_wr32(falcon, 0x100, 0x2);
253239 }
254240
255
-static int
241
+int
256242 nvkm_falcon_v1_wait_for_halt(struct nvkm_falcon *falcon, u32 ms)
257243 {
258244 struct nvkm_device *device = falcon->owner->device;
....@@ -265,7 +251,7 @@
265251 return 0;
266252 }
267253
268
-static int
254
+int
269255 nvkm_falcon_v1_clear_interrupt(struct nvkm_falcon *falcon, u32 mask)
270256 {
271257 struct nvkm_device *device = falcon->owner->device;
....@@ -294,7 +280,7 @@
294280 return 0;
295281 }
296282
297
-static int
283
+int
298284 nvkm_falcon_v1_enable(struct nvkm_falcon *falcon)
299285 {
300286 struct nvkm_device *device = falcon->owner->device;
....@@ -316,7 +302,7 @@
316302 return 0;
317303 }
318304
319
-static void
305
+void
320306 nvkm_falcon_v1_disable(struct nvkm_falcon *falcon)
321307 {
322308 /* disable IRQs and wait for any previous code to complete */