forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c
....@@ -45,7 +45,7 @@
4545 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734 + sm * 0x80), gerr);
4646 }
4747
48
-static void
48
+void
4949 gv100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc)
5050 {
5151 gv100_gr_trap_sm(gr, gpc, tpc, 0);
....@@ -59,7 +59,7 @@
5959 nvkm_mask(device, 0x4188a4, 0x03000000, 0x03000000);
6060 }
6161
62
-static void
62
+void
6363 gv100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
6464 {
6565 struct nvkm_device *device = gr->base.engine.subdev.device;
....@@ -71,14 +71,14 @@
7171 }
7272 }
7373
74
-static void
74
+void
7575 gv100_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
7676 {
7777 struct nvkm_device *device = gr->base.engine.subdev.device;
7878 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0x403f0000);
7979 }
8080
81
-static void
81
+void
8282 gv100_gr_init_419bd8(struct gf100_gr *gr)
8383 {
8484 struct nvkm_device *device = gr->base.engine.subdev.device;
....@@ -120,8 +120,28 @@
120120 }
121121 };
122122
123
+MODULE_FIRMWARE("nvidia/gv100/gr/fecs_bl.bin");
124
+MODULE_FIRMWARE("nvidia/gv100/gr/fecs_inst.bin");
125
+MODULE_FIRMWARE("nvidia/gv100/gr/fecs_data.bin");
126
+MODULE_FIRMWARE("nvidia/gv100/gr/fecs_sig.bin");
127
+MODULE_FIRMWARE("nvidia/gv100/gr/gpccs_bl.bin");
128
+MODULE_FIRMWARE("nvidia/gv100/gr/gpccs_inst.bin");
129
+MODULE_FIRMWARE("nvidia/gv100/gr/gpccs_data.bin");
130
+MODULE_FIRMWARE("nvidia/gv100/gr/gpccs_sig.bin");
131
+MODULE_FIRMWARE("nvidia/gv100/gr/sw_ctx.bin");
132
+MODULE_FIRMWARE("nvidia/gv100/gr/sw_nonctx.bin");
133
+MODULE_FIRMWARE("nvidia/gv100/gr/sw_bundle_init.bin");
134
+MODULE_FIRMWARE("nvidia/gv100/gr/sw_method_init.bin");
135
+
136
+static const struct gf100_gr_fwif
137
+gv100_gr_fwif[] = {
138
+ { 0, gm200_gr_load, &gv100_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },
139
+ { -1, gm200_gr_nofw },
140
+ {}
141
+};
142
+
123143 int
124144 gv100_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
125145 {
126
- return gm200_gr_new_(&gv100_gr, device, index, pgr);
146
+ return gf100_gr_new_(gv100_gr_fwif, device, index, pgr);
127147 }