disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
..
..
@@ -22,6 +22,7 @@
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22
 #include "gf100.h"
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23
 #include "ctxgf100.h"
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24
 
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+#include <core/firmware.h>
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 #include <subdev/timer.h>
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27
 
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 #include <nvif/class.h>
..
..
@@ -32,22 +33,23 @@
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 	u32 data;
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 };
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35
 
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-int
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-gk20a_gr_av_to_init(struct gf100_gr *gr, const char *fw_name,
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-		    struct gf100_gr_pack **ppack)
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+static int
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+gk20a_gr_av_to_init(struct gf100_gr *gr, const char *path, const char *name,
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+		    int ver, struct gf100_gr_pack **ppack)
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 {
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-	struct gf100_gr_fuc fuc;
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+	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
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+	struct nvkm_blob blob;
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 	struct gf100_gr_init *init;
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 	struct gf100_gr_pack *pack;
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 	int nent;
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 	int ret;
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 	int i;
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47
 
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-	ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
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+	ret = nvkm_firmware_load_blob(subdev, path, name, ver, &blob);
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 	if (ret)
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 		return ret;
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-	nent = (fuc.size / sizeof(struct gk20a_fw_av));
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+	nent = (blob.size / sizeof(struct gk20a_fw_av));
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 	pack = vzalloc((sizeof(*pack) * 2) + (sizeof(*init) * (nent + 1)));
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 	if (!pack) {
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 		ret = -ENOMEM;
..
..
@@ -59,7 +61,7 @@
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61
 
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 	for (i = 0; i < nent; i++) {
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 		struct gf100_gr_init *ent = &init[i];
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-		struct gk20a_fw_av *av = &((struct gk20a_fw_av *)fuc.data)[i];
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+		struct gk20a_fw_av *av = &((struct gk20a_fw_av *)blob.data)[i];
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65
 
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 		ent->addr = av->addr;
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 		ent->data = av->data;
..
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@@ -70,7 +72,7 @@
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 	*ppack = pack;
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73
 
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 end:
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-	gf100_gr_dtor_fw(&fuc);
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+	nvkm_blob_dtor(&blob);
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 	return ret;
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 }
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78
 
..
..
@@ -81,22 +83,23 @@
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 	u32 data;
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 };
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85
 
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-int
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-gk20a_gr_aiv_to_init(struct gf100_gr *gr, const char *fw_name,
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-		     struct gf100_gr_pack **ppack)
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+static int
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+gk20a_gr_aiv_to_init(struct gf100_gr *gr, const char *path, const char *name,
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+		     int ver, struct gf100_gr_pack **ppack)
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 {
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-	struct gf100_gr_fuc fuc;
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+	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
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+	struct nvkm_blob blob;
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 	struct gf100_gr_init *init;
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 	struct gf100_gr_pack *pack;
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 	int nent;
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 	int ret;
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 	int i;
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-	ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
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+	ret = nvkm_firmware_load_blob(subdev, path, name, ver, &blob);
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 	if (ret)
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 		return ret;
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-	nent = (fuc.size / sizeof(struct gk20a_fw_aiv));
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+	nent = (blob.size / sizeof(struct gk20a_fw_aiv));
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 	pack = vzalloc((sizeof(*pack) * 2) + (sizeof(*init) * (nent + 1)));
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 	if (!pack) {
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 		ret = -ENOMEM;
..
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@@ -108,7 +111,7 @@
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111
 
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 	for (i = 0; i < nent; i++) {
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 		struct gf100_gr_init *ent = &init[i];
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-		struct gk20a_fw_aiv *av = &((struct gk20a_fw_aiv *)fuc.data)[i];
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+		struct gk20a_fw_aiv *av = &((struct gk20a_fw_aiv *)blob.data)[i];
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 		ent->addr = av->addr;
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 		ent->data = av->data;
..
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@@ -119,15 +122,16 @@
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 	*ppack = pack;
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123
 
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 end:
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-	gf100_gr_dtor_fw(&fuc);
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+	nvkm_blob_dtor(&blob);
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 	return ret;
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 }
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-int
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-gk20a_gr_av_to_method(struct gf100_gr *gr, const char *fw_name,
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-		      struct gf100_gr_pack **ppack)
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+static int
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+gk20a_gr_av_to_method(struct gf100_gr *gr, const char *path, const char *name,
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+		      int ver, struct gf100_gr_pack **ppack)
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 {
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-	struct gf100_gr_fuc fuc;
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+	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
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+	struct nvkm_blob blob;
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 	struct gf100_gr_init *init;
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 	struct gf100_gr_pack *pack;
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 	/* We don't suppose we will initialize more than 16 classes here... */
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@@ -137,11 +141,11 @@
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 	int ret;
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 	int i;
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143
 
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-	ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
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+	ret = nvkm_firmware_load_blob(subdev, path, name, ver, &blob);
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 	if (ret)
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 		return ret;
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-	nent = (fuc.size / sizeof(struct gk20a_fw_av));
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+	nent = (blob.size / sizeof(struct gk20a_fw_av));
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149
 
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 	pack = vzalloc((sizeof(*pack) * (max_classes + 1)) +
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 		       (sizeof(*init) * (nent + max_classes + 1)));
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@@ -153,7 +157,7 @@
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 	init = (void *)(pack + max_classes + 1);
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158
 
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 	for (i = 0; i < nent; i++, init++) {
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-		struct gk20a_fw_av *av = &((struct gk20a_fw_av *)fuc.data)[i];
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+		struct gk20a_fw_av *av = &((struct gk20a_fw_av *)blob.data)[i];
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 		u32 class = av->addr & 0xffff;
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 		u32 addr = (av->addr & 0xffff0000) >> 14;
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163
 
..
..
@@ -179,7 +183,7 @@
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 	*ppack = pack;
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184
 
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 end:
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-	gf100_gr_dtor_fw(&fuc);
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+	nvkm_blob_dtor(&blob);
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 	return ret;
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 }
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..
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@@ -225,7 +229,7 @@
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 	/* Clear SCC RAM */
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 	nvkm_wr32(device, 0x40802c, 0x1);
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231
 
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-	gf100_gr_mmio(gr, gr->fuc_sw_nonctx);
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+	gf100_gr_mmio(gr, gr->sw_nonctx);
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 	ret = gk20a_gr_wait_mem_scrubbing(gr);
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 	if (ret)
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@@ -304,40 +308,56 @@
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 };
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309
 
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 int
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-gk20a_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
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+gk20a_gr_load_sw(struct gf100_gr *gr, const char *path, int ver)
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 {
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-	struct gf100_gr *gr;
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-	int ret;
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-
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-	if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL)))
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-		return -ENOMEM;
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-	*pgr = &gr->base;
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-
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-	ret = gf100_gr_ctor(&gk20a_gr, device, index, gr);
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-	if (ret)
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-		return ret;
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-
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-	if (gf100_gr_ctor_fw(gr, "fecs_inst", &gr->fuc409c) ||
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-	    gf100_gr_ctor_fw(gr, "fecs_data", &gr->fuc409d) ||
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-	    gf100_gr_ctor_fw(gr, "gpccs_inst", &gr->fuc41ac) ||
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-	    gf100_gr_ctor_fw(gr, "gpccs_data", &gr->fuc41ad))
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-		return -ENODEV;
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-
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-	ret = gk20a_gr_av_to_init(gr, "sw_nonctx", &gr->fuc_sw_nonctx);
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-	if (ret)
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-		return ret;
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-
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-	ret = gk20a_gr_aiv_to_init(gr, "sw_ctx", &gr->fuc_sw_ctx);
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-	if (ret)
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-		return ret;
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-
334
-	ret = gk20a_gr_av_to_init(gr, "sw_bundle_init", &gr->fuc_bundle);
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-	if (ret)
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-		return ret;
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-
338
-	ret = gk20a_gr_av_to_method(gr, "sw_method_init", &gr->fuc_method);
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-	if (ret)
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-		return ret;
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+	if (gk20a_gr_av_to_init(gr, path, "sw_nonctx", ver, &gr->sw_nonctx) ||
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+	    gk20a_gr_aiv_to_init(gr, path, "sw_ctx", ver, &gr->sw_ctx) ||
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+	    gk20a_gr_av_to_init(gr, path, "sw_bundle_init", ver, &gr->bundle) ||
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+	    gk20a_gr_av_to_method(gr, path, "sw_method_init", ver, &gr->method))
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+		return -ENOENT;
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318
 
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 	return 0;
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320
 }
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+
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+#if IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC)
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+MODULE_FIRMWARE("nvidia/gk20a/fecs_data.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/fecs_inst.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/gpccs_data.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/gpccs_inst.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/sw_bundle_init.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/sw_ctx.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/sw_method_init.bin");
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+MODULE_FIRMWARE("nvidia/gk20a/sw_nonctx.bin");
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+#endif
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+
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+static int
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+gk20a_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
335
+{
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+	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
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+
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+	if (nvkm_firmware_load_blob(subdev, "", "fecs_inst", ver,
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+				    &gr->fecs.inst) ||
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+	    nvkm_firmware_load_blob(subdev, "", "fecs_data", ver,
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+				    &gr->fecs.data) ||
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+	    nvkm_firmware_load_blob(subdev, "", "gpccs_inst", ver,
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+				    &gr->gpccs.inst) ||
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+	    nvkm_firmware_load_blob(subdev, "", "gpccs_data", ver,
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+				    &gr->gpccs.data))
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+		return -ENOENT;
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+
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+	gr->firmware = true;
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+
350
+	return gk20a_gr_load_sw(gr, "", ver);
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+}
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+
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+static const struct gf100_gr_fwif
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+gk20a_gr_fwif[] = {
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+	{ 0, gk20a_gr_load, &gk20a_gr },
356
+	{}
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+};
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+
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+int
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+gk20a_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
361
+{
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+	return gf100_gr_new_(gk20a_gr_fwif, device, index, pgr);
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+}