disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c
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@@ -25,8 +25,14 @@
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 #include <core/client.h>
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 #include <core/gpuobj.h>
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-#include <nvif/cla06f.h>
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+#include <nvif/clc36f.h>
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 #include <nvif/unpack.h>
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+
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+static u32
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+gv100_fifo_gpfifo_submit_token(struct nvkm_fifo_chan *chan)
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+{
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+	return chan->chid;
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+}
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36
 
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 static int
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 gv100_fifo_gpfifo_engine_valid(struct gk104_fifo_chan *chan, bool ce, bool valid)
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@@ -56,7 +62,7 @@
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 	return ret;
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 }
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-static int
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+int
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 gv100_fifo_gpfifo_engine_fini(struct nvkm_fifo_chan *base,
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 			      struct nvkm_engine *engine, bool suspend)
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 {
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@@ -79,7 +85,7 @@
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 	return ret;
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 }
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-static int
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+int
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 gv100_fifo_gpfifo_engine_init(struct nvkm_fifo_chan *base,
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 			      struct nvkm_engine *engine)
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 {
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@@ -100,8 +106,8 @@
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 	return gv100_fifo_gpfifo_engine_valid(chan, false, true);
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 }
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-const struct nvkm_fifo_chan_func
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-gv100_fifo_gpfifo_func = {
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+static const struct nvkm_fifo_chan_func
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+gv100_fifo_gpfifo = {
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 	.dtor = gk104_fifo_gpfifo_dtor,
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 	.init = gk104_fifo_gpfifo_init,
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 	.fini = gk104_fifo_gpfifo_fini,
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@@ -110,19 +116,23 @@
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 	.engine_dtor = gk104_fifo_gpfifo_engine_dtor,
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 	.engine_init = gv100_fifo_gpfifo_engine_init,
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 	.engine_fini = gv100_fifo_gpfifo_engine_fini,
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+	.submit_token = gv100_fifo_gpfifo_submit_token,
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 };
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-static int
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-gv100_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
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-		       u64 vmm, u64 ioffset, u64 ilength,
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-		       const struct nvkm_oclass *oclass,
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+int
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+gv100_fifo_gpfifo_new_(const struct nvkm_fifo_chan_func *func,
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+		       struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
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+		       u64 vmm, u64 ioffset, u64 ilength, u64 *inst, bool priv,
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+		       u32 *token, const struct nvkm_oclass *oclass,
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 		       struct nvkm_object **pobject)
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 {
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+	struct nvkm_device *device = fifo->base.engine.subdev.device;
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 	struct gk104_fifo_chan *chan;
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 	int runlist = ffs(*runlists) -1, ret, i;
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 	unsigned long engm;
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 	u64 subdevs = 0;
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-	u64 usermem;
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+	u64 usermem, mthd;
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+	u32 size;
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 	if (!vmm || runlist < 0 || runlist >= fifo->runlist_nr)
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 		return -EINVAL;
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@@ -142,14 +152,15 @@
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 	chan->runl = runlist;
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 	INIT_LIST_HEAD(&chan->head);
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-	ret = nvkm_fifo_chan_ctor(&gv100_fifo_gpfifo_func, &fifo->base,
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-				  0x1000, 0x1000, true, vmm, 0, subdevs,
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-				  1, fifo->user.bar->addr, 0x200,
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+	ret = nvkm_fifo_chan_ctor(func, &fifo->base, 0x1000, 0x1000, true, vmm,
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+				  0, subdevs, 1, fifo->user.bar->addr, 0x200,
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 				  oclass, &chan->base);
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 	if (ret)
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 		return ret;
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 	*chid = chan->base.chid;
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+	*inst = chan->base.inst->addr;
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+	*token = chan->base.func->submit_token(&chan->base);
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 	/* Hack to support GPUs where even individual channels should be
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 	 * part of a channel group.
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@@ -173,6 +184,20 @@
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 	nvkm_done(fifo->user.mem);
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 	usermem = nvkm_memory_addr(fifo->user.mem) + usermem;
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+	/* Allocate fault method buffer (magics come from nvgpu). */
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+	size = nvkm_rd32(device, 0x104028); /* NV_PCE_PCE_MAP */
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+	size = 27 * 5 * (((9 + 1 + 3) * hweight32(size)) + 2);
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+	size = roundup(size, PAGE_SIZE);
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+
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+	ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, true,
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+			      &chan->mthd);
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+	if (ret)
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+		return ret;
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+
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+	mthd = nvkm_memory_bar2(chan->mthd);
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+	if (mthd == ~0ULL)
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+		return -EFAULT;
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+
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 	/* RAMFC */
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 	nvkm_kmap(chan->base.inst);
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 	nvkm_wo32(chan->base.inst, 0x008, lower_32_bits(usermem));
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@@ -184,13 +209,13 @@
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 					  (ilength << 16));
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 	nvkm_wo32(chan->base.inst, 0x084, 0x20400000);
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 	nvkm_wo32(chan->base.inst, 0x094, 0x30000001);
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-	nvkm_wo32(chan->base.inst, 0x0e4, 0x00000020);
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+	nvkm_wo32(chan->base.inst, 0x0e4, priv ? 0x00000020 : 0x00000000);
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 	nvkm_wo32(chan->base.inst, 0x0e8, chan->base.chid);
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-	nvkm_wo32(chan->base.inst, 0x0f4, 0x00001100);
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+	nvkm_wo32(chan->base.inst, 0x0f4, 0x00001000);
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 	nvkm_wo32(chan->base.inst, 0x0f8, 0x10003080);
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 	nvkm_mo32(chan->base.inst, 0x218, 0x00000000, 0x00000000);
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-	nvkm_wo32(chan->base.inst, 0x220, 0x020a1000);
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-	nvkm_wo32(chan->base.inst, 0x224, 0x00000000);
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+	nvkm_wo32(chan->base.inst, 0x220, lower_32_bits(mthd));
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+	nvkm_wo32(chan->base.inst, 0x224, upper_32_bits(mthd));
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 	nvkm_done(chan->base.inst);
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 	return gv100_fifo_gpfifo_engine_valid(chan, true, true);
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 }
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@@ -201,7 +226,7 @@
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 {
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 	struct nvkm_object *parent = oclass->parent;
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 	union {
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-		struct kepler_channel_gpfifo_a_v0 v0;
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+		struct volta_channel_gpfifo_a_v0 v0;
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 	} *args = data;
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 	int ret = -ENOSYS;
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@@ -209,15 +234,20 @@
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 	if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
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 		nvif_ioctl(parent, "create channel gpfifo vers %d vmm %llx "
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 				   "ioffset %016llx ilength %08x "
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-				   "runlist %016llx\n",
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+				   "runlist %016llx priv %d\n",
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 			   args->v0.version, args->v0.vmm, args->v0.ioffset,
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-			   args->v0.ilength, args->v0.runlist);
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-		return gv100_fifo_gpfifo_new_(fifo,
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+			   args->v0.ilength, args->v0.runlist, args->v0.priv);
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+		if (args->v0.priv && !oclass->client->super)
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+			return -EINVAL;
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+		return gv100_fifo_gpfifo_new_(&gv100_fifo_gpfifo, fifo,
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 					      &args->v0.runlist,
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 					      &args->v0.chid,
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 					       args->v0.vmm,
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 					       args->v0.ioffset,
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 					       args->v0.ilength,
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+					      &args->v0.inst,
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+					       args->v0.priv,
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+					      &args->v0.token,
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 					      oclass, pobject);
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 	}
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