| .. | .. |
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| 120 | 120 | gf119_sor_clock(struct nvkm_ior *sor) |
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| 121 | 121 | { |
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| 122 | 122 | struct nvkm_device *device = sor->disp->engine.subdev.device; |
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| 123 | | - const int div = sor->asy.link == 3; |
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| 124 | 123 | const u32 soff = nv50_ior_base(sor); |
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| 124 | + u32 div1 = sor->asy.link == 3; |
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| 125 | + u32 div2 = sor->asy.link == 3; |
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| 125 | 126 | if (sor->asy.proto == TMDS) { |
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| 126 | | - /* NFI why, but this sets DP_LINK_BW_2_7 when using TMDS. */ |
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| 127 | | - nvkm_mask(device, 0x612300 + soff, 0x007c0000, 0x0a << 18); |
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| 127 | + const u32 speed = sor->tmds.high_speed ? 0x14 : 0x0a; |
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| 128 | + nvkm_mask(device, 0x612300 + soff, 0x007c0000, speed << 18); |
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| 129 | + if (sor->tmds.high_speed) |
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| 130 | + div2 = 1; |
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| 128 | 131 | } |
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| 129 | | - nvkm_mask(device, 0x612300 + soff, 0x00000707, (div << 8) | div); |
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| 132 | + nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1); |
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| 130 | 133 | } |
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| 131 | 134 | |
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| 132 | 135 | void |
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| .. | .. |
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| 174 | 177 | .hda = { |
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| 175 | 178 | .hpd = gf119_hda_hpd, |
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| 176 | 179 | .eld = gf119_hda_eld, |
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| 180 | + .device_entry = gf119_hda_device_entry, |
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| 177 | 181 | }, |
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| 178 | 182 | }; |
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| 179 | 183 | |
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