disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
..
..
@@ -27,169 +27,276 @@
27
27
 #include <nouveau_bo.h>
28
28
 
29
29
 #include <nvif/clc37e.h>
30
+#include <nvif/pushc37b.h>
30
31
 
31
-static void
32
+#include <nvhw/class/clc37e.h>
33
+
34
+static int
35
+wndwc37e_csc_clr(struct nv50_wndw *wndw)
36
+{
37
+	return 0;
38
+}
39
+
40
+static int
41
+wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
42
+{
43
+	struct nvif_push *push = wndw->wndw.push;
44
+	int ret;
45
+
46
+	if ((ret = PUSH_WAIT(push, 13)))
47
+		return ret;
48
+
49
+	PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
50
+	return 0;
51
+}
52
+
53
+static int
32
54
 wndwc37e_ilut_clr(struct nv50_wndw *wndw)
33
55
 {
34
-	u32 *push;
35
-	if ((push = evo_wait(&wndw->wndw, 2))) {
36
-		evo_mthd(push, 0x02b8, 1);
37
-		evo_data(push, 0x00000000);
38
-		evo_kick(push, &wndw->wndw);
39
-	}
56
+	struct nvif_push *push = wndw->wndw.push;
57
+	int ret;
58
+
59
+	if ((ret = PUSH_WAIT(push, 2)))
60
+		return ret;
61
+
62
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_INPUT_LUT, 0x00000000);
63
+	return 0;
40
64
 }
41
65
 
42
-static void
66
+static int
43
67
 wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
44
68
 {
45
-	u32 *push;
46
-	if ((push = evo_wait(&wndw->wndw, 4))) {
47
-		evo_mthd(push, 0x02b0, 3);
48
-		evo_data(push, asyw->xlut.i.output_mode << 8 |
49
-			       asyw->xlut.i.range << 4 |
50
-			       asyw->xlut.i.size);
51
-		evo_data(push, asyw->xlut.i.offset >> 8);
52
-		evo_data(push, asyw->xlut.handle);
53
-		evo_kick(push, &wndw->wndw);
54
-	}
69
+	struct nvif_push *push = wndw->wndw.push;
70
+	int ret;
71
+
72
+	if ((ret = PUSH_WAIT(push, 4)))
73
+		return ret;
74
+
75
+	PUSH_MTHD(push, NVC37E, SET_CONTROL_INPUT_LUT,
76
+		  NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |
77
+		  NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |
78
+		  NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),
79
+
80
+				SET_OFFSET_INPUT_LUT, asyw->xlut.i.offset >> 8,
81
+				SET_CONTEXT_DMA_INPUT_LUT, asyw->xlut.handle);
82
+	return 0;
55
83
 }
56
84
 
57
-static void
58
-wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
85
+static bool
86
+wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
59
87
 {
60
-	asyw->xlut.i.mode = 2;
61
-	asyw->xlut.i.size = 0;
62
-	asyw->xlut.i.range = 0;
63
-	asyw->xlut.i.output_mode = 1;
88
+	if (size != 256 && size != 1024)
89
+		return false;
90
+
91
+	asyw->xlut.i.size = size == 1024 ? NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 :
92
+					   NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_257;
93
+	asyw->xlut.i.range = NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY;
94
+	asyw->xlut.i.output_mode = NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE;
95
+	asyw->xlut.i.load = head907d_olut_load;
96
+	return true;
64
97
 }
65
98
 
66
-static void
99
+int
100
+wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
101
+{
102
+	struct nvif_push *push = wndw->wndw.push;
103
+	int ret;
104
+
105
+	if ((ret = PUSH_WAIT(push, 8)))
106
+		return ret;
107
+
108
+	PUSH_MTHD(push, NVC37E, SET_COMPOSITION_CONTROL,
109
+		  NVDEF(NVC37E, SET_COMPOSITION_CONTROL, COLOR_KEY_SELECT, DISABLE) |
110
+		  NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),
111
+
112
+				SET_COMPOSITION_CONSTANT_ALPHA,
113
+		  NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |
114
+		  NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K2, 0),
115
+
116
+				SET_COMPOSITION_FACTOR_SELECT,
117
+		  NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_MATCH_SELECT,
118
+							       asyw->blend.src_color) |
119
+		  NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_NO_MATCH_SELECT,
120
+							       asyw->blend.src_color) |
121
+		  NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_MATCH_SELECT,
122
+							       asyw->blend.dst_color) |
123
+		  NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_NO_MATCH_SELECT,
124
+							       asyw->blend.dst_color),
125
+
126
+				SET_KEY_ALPHA,
127
+		  NVVAL(NVC37E, SET_KEY_ALPHA, MIN, 0x0000) |
128
+		  NVVAL(NVC37E, SET_KEY_ALPHA, MAX, 0xffff),
129
+
130
+				SET_KEY_RED_CR,
131
+		  NVVAL(NVC37E, SET_KEY_RED_CR, MIN, 0x0000) |
132
+		  NVVAL(NVC37E, SET_KEY_RED_CR, MAX, 0xffff),
133
+
134
+				SET_KEY_GREEN_Y,
135
+		  NVVAL(NVC37E, SET_KEY_GREEN_Y, MIN, 0x0000) |
136
+		  NVVAL(NVC37E, SET_KEY_GREEN_Y, MAX, 0xffff),
137
+
138
+				SET_KEY_BLUE_CB,
139
+		  NVVAL(NVC37E, SET_KEY_BLUE_CB, MIN, 0x0000) |
140
+		  NVVAL(NVC37E, SET_KEY_BLUE_CB, MAX, 0xffff));
141
+	return 0;
142
+}
143
+
144
+int
67
145
 wndwc37e_image_clr(struct nv50_wndw *wndw)
68
146
 {
69
-	u32 *push;
70
-	if ((push = evo_wait(&wndw->wndw, 4))) {
71
-		evo_mthd(push, 0x0308, 1);
72
-		evo_data(push, 0x00000000);
73
-		evo_mthd(push, 0x0240, 1);
74
-		evo_data(push, 0x00000000);
75
-		evo_kick(push, &wndw->wndw);
76
-	}
147
+	struct nvif_push *push = wndw->wndw.push;
148
+	int ret;
149
+
150
+	if ((ret = PUSH_WAIT(push, 4)))
151
+		return ret;
152
+
153
+	PUSH_MTHD(push, NVC37E, SET_PRESENT_CONTROL,
154
+		  NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0) |
155
+		  NVDEF(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING));
156
+
157
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), 0x00000000);
158
+	return 0;
77
159
 }
78
160
 
79
-static void
161
+static int
80
162
 wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
81
163
 {
82
-	u32 *push;
164
+	struct nvif_push *push = wndw->wndw.push;
165
+	int ret;
83
166
 
84
-	if (!(push = evo_wait(&wndw->wndw, 25)))
85
-		return;
167
+	if ((ret = PUSH_WAIT(push, 17)))
168
+		return ret;
86
169
 
87
-	evo_mthd(push, 0x0308, 1);
88
-	evo_data(push, asyw->image.mode << 4 | asyw->image.interval);
89
-	evo_mthd(push, 0x0224, 4);
90
-	evo_data(push, asyw->image.h << 16 | asyw->image.w);
91
-	evo_data(push, asyw->image.layout << 4 | asyw->image.blockh);
92
-	evo_data(push, asyw->image.colorspace << 8 | asyw->image.format);
93
-	evo_data(push, asyw->image.blocks[0] | (asyw->image.pitch[0] >> 6));
94
-	evo_mthd(push, 0x0240, 1);
95
-	evo_data(push, asyw->image.handle[0]);
96
-	evo_mthd(push, 0x0260, 1);
97
-	evo_data(push, asyw->image.offset[0] >> 8);
98
-	evo_mthd(push, 0x0290, 1);
99
-	evo_data(push, (asyw->state.src_y >> 16) << 16 |
100
-		       (asyw->state.src_x >> 16));
101
-	evo_mthd(push, 0x0298, 1);
102
-	evo_data(push, (asyw->state.src_h >> 16) << 16 |
103
-		       (asyw->state.src_w >> 16));
104
-	evo_mthd(push, 0x02a4, 1);
105
-	evo_data(push, asyw->state.crtc_h << 16 |
106
-		       asyw->state.crtc_w);
170
+	PUSH_MTHD(push, NVC37E, SET_PRESENT_CONTROL,
171
+		  NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |
172
+		  NVVAL(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
173
+		  NVDEF(NVC37E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE));
107
174
 
108
-	/*XXX: Composition-related stuff.  Need to implement properly. */
109
-	evo_mthd(push, 0x02ec, 1);
110
-	evo_data(push, (2 - (wndw->id & 1)) << 4);
111
-	evo_mthd(push, 0x02f4, 5);
112
-	evo_data(push, 0x00000011);
113
-	evo_data(push, 0xffff0000);
114
-	evo_data(push, 0xffff0000);
115
-	evo_data(push, 0xffff0000);
116
-	evo_data(push, 0xffff0000);
117
-	evo_kick(push, &wndw->wndw);
175
+	PUSH_MTHD(push, NVC37E, SET_SIZE,
176
+		  NVVAL(NVC37E, SET_SIZE, WIDTH, asyw->image.w) |
177
+		  NVVAL(NVC37E, SET_SIZE, HEIGHT, asyw->image.h),
178
+
179
+				SET_STORAGE,
180
+		  NVVAL(NVC37E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
181
+		  NVVAL(NVC37E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
182
+
183
+				SET_PARAMS,
184
+		  NVVAL(NVC37E, SET_PARAMS, FORMAT, asyw->image.format) |
185
+		  NVVAL(NVC37E, SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |
186
+		  NVDEF(NVC37E, SET_PARAMS, INPUT_RANGE, BYPASS) |
187
+		  NVDEF(NVC37E, SET_PARAMS, UNDERREPLICATE, DISABLE) |
188
+		  NVDEF(NVC37E, SET_PARAMS, DE_GAMMA, NONE) |
189
+		  NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |
190
+		  NVDEF(NVC37E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) |
191
+		  NVDEF(NVC37E, SET_PARAMS, SWAP_UV, DISABLE),
192
+
193
+				SET_PLANAR_STORAGE(0),
194
+		  NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |
195
+		  NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
196
+
197
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
198
+	PUSH_MTHD(push, NVC37E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
199
+
200
+	PUSH_MTHD(push, NVC37E, SET_POINT_IN(0),
201
+		  NVVAL(NVC37E, SET_POINT_IN, X, asyw->state.src_x >> 16) |
202
+		  NVVAL(NVC37E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
203
+
204
+	PUSH_MTHD(push, NVC37E, SET_SIZE_IN,
205
+		  NVVAL(NVC37E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |
206
+		  NVVAL(NVC37E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
207
+
208
+	PUSH_MTHD(push, NVC37E, SET_SIZE_OUT,
209
+		  NVVAL(NVC37E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |
210
+		  NVVAL(NVC37E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
211
+	return 0;
118
212
 }
119
213
 
120
-static void
214
+int
121
215
 wndwc37e_ntfy_clr(struct nv50_wndw *wndw)
122
216
 {
123
-	u32 *push;
124
-	if ((push = evo_wait(&wndw->wndw, 2))) {
125
-		evo_mthd(push, 0x021c, 1);
126
-		evo_data(push, 0x00000000);
127
-		evo_kick(push, &wndw->wndw);
128
-	}
217
+	struct nvif_push *push = wndw->wndw.push;
218
+	int ret;
219
+
220
+	if ((ret = PUSH_WAIT(push, 2)))
221
+		return ret;
222
+
223
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, 0x00000000);
224
+	return 0;
129
225
 }
130
226
 
131
-static void
227
+int
132
228
 wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
133
229
 {
134
-	u32 *push;
135
-	if ((push = evo_wait(&wndw->wndw, 3))) {
136
-		evo_mthd(push, 0x021c, 2);
137
-		evo_data(push, asyw->ntfy.handle);
138
-		evo_data(push, asyw->ntfy.offset | asyw->ntfy.awaken);
139
-		evo_kick(push, &wndw->wndw);
140
-	}
230
+	struct nvif_push *push = wndw->wndw.push;
231
+	int ret;
232
+
233
+	if ((ret = PUSH_WAIT(push, 3)))
234
+		return ret;
235
+
236
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle,
237
+
238
+				SET_NOTIFIER_CONTROL,
239
+		  NVVAL(NVC37E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |
240
+		  NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));
241
+	return 0;
141
242
 }
142
243
 
143
-static void
244
+int
144
245
 wndwc37e_sema_clr(struct nv50_wndw *wndw)
145
246
 {
146
-	u32 *push;
147
-	if ((push = evo_wait(&wndw->wndw, 2))) {
148
-		evo_mthd(push, 0x0218, 1);
149
-		evo_data(push, 0x00000000);
150
-		evo_kick(push, &wndw->wndw);
151
-	}
247
+	struct nvif_push *push = wndw->wndw.push;
248
+	int ret;
249
+
250
+	if ((ret = PUSH_WAIT(push, 2)))
251
+		return ret;
252
+
253
+	PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_SEMAPHORE, 0x00000000);
254
+	return 0;
152
255
 }
153
256
 
154
-static void
257
+int
155
258
 wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
156
259
 {
157
-	u32 *push;
158
-	if ((push = evo_wait(&wndw->wndw, 5))) {
159
-		evo_mthd(push, 0x020c, 4);
160
-		evo_data(push, asyw->sema.offset);
161
-		evo_data(push, asyw->sema.acquire);
162
-		evo_data(push, asyw->sema.release);
163
-		evo_data(push, asyw->sema.handle);
164
-		evo_kick(push, &wndw->wndw);
165
-	}
260
+	struct nvif_push *push = wndw->wndw.push;
261
+	int ret;
262
+
263
+	if ((ret = PUSH_WAIT(push, 5)))
264
+		return ret;
265
+
266
+	PUSH_MTHD(push, NVC37E, SET_SEMAPHORE_CONTROL, asyw->sema.offset,
267
+				SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire,
268
+				SET_SEMAPHORE_RELEASE, asyw->sema.release,
269
+				SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle);
270
+	return 0;
166
271
 }
167
272
 
168
-static void
273
+int
169
274
 wndwc37e_update(struct nv50_wndw *wndw, u32 *interlock)
170
275
 {
171
-	u32 *push;
172
-	if ((push = evo_wait(&wndw->wndw, 5))) {
173
-		evo_mthd(push, 0x0370, 2);
174
-		evo_data(push, interlock[NV50_DISP_INTERLOCK_CURS] << 1 |
175
-			       interlock[NV50_DISP_INTERLOCK_CORE]);
176
-		evo_data(push, interlock[NV50_DISP_INTERLOCK_WNDW]);
177
-		evo_mthd(push, 0x0200, 1);
178
-		if (interlock[NV50_DISP_INTERLOCK_WIMM] & wndw->interlock.data)
179
-			evo_data(push, 0x00001001);
180
-		else
181
-			evo_data(push, 0x00000001);
182
-		evo_kick(push, &wndw->wndw);
183
-	}
276
+	struct nvif_push *push = wndw->wndw.push;
277
+	int ret;
278
+
279
+	if ((ret = PUSH_WAIT(push, 5)))
280
+		return ret;
281
+
282
+	PUSH_MTHD(push, NVC37E, SET_INTERLOCK_FLAGS, interlock[NV50_DISP_INTERLOCK_CURS] << 1 |
283
+						     interlock[NV50_DISP_INTERLOCK_CORE],
284
+				SET_WINDOW_INTERLOCK_FLAGS, interlock[NV50_DISP_INTERLOCK_WNDW]);
285
+
286
+	PUSH_MTHD(push, NVC37E, UPDATE, 0x00000001 |
287
+		  NVVAL(NVC37E, UPDATE, INTERLOCK_WITH_WIN_IMM,
288
+			  !!(interlock[NV50_DISP_INTERLOCK_WIMM] & wndw->interlock.data)));
289
+
290
+	return PUSH_KICK(push);
184
291
 }
185
292
 
186
-static void
293
+void
187
294
 wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
188
295
 		 struct nv50_head_atom *asyh)
189
296
 {
190
297
 }
191
298
 
192
-static int
299
+int
193
300
 wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
194
301
 		 struct nv50_head_atom *asyh)
195
302
 {
..
..
@@ -215,6 +322,8 @@
215
322
 	DRM_FORMAT_ABGR8888,
216
323
 	DRM_FORMAT_XRGB2101010,
217
324
 	DRM_FORMAT_ARGB2101010,
325
+	DRM_FORMAT_XBGR16161616F,
326
+	DRM_FORMAT_ABGR16161616F,
218
327
 	0
219
328
 };
220
329
 
..
..
@@ -229,14 +338,19 @@
229
338
 	.ntfy_reset = corec37d_ntfy_init,
230
339
 	.ntfy_wait_begun = base507c_ntfy_wait_begun,
231
340
 	.ilut = wndwc37e_ilut,
341
+	.ilut_size = 1024,
232
342
 	.xlut_set = wndwc37e_ilut_set,
233
343
 	.xlut_clr = wndwc37e_ilut_clr,
344
+	.csc = base907c_csc,
345
+	.csc_set = wndwc37e_csc_set,
346
+	.csc_clr = wndwc37e_csc_clr,
234
347
 	.image_set = wndwc37e_image_set,
235
348
 	.image_clr = wndwc37e_image_clr,
349
+	.blend_set = wndwc37e_blend_set,
236
350
 	.update = wndwc37e_update,
237
351
 };
238
352
 
239
-static int
353
+int
240
354
 wndwc37e_new_(const struct nv50_wndw_func *func, struct nouveau_drm *drm,
241
355
 	      enum drm_plane_type type, int index, s32 oclass, u32 heads,
242
356
 	      struct nv50_wndw **pwndw)
..
..
@@ -257,7 +371,7 @@
257
371
 
258
372
 	ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
259
373
 			       &oclass, 0, &args, sizeof(args),
260
-			       disp->sync->bo.offset, &wndw->wndw);
374
+			       disp->sync->offset, &wndw->wndw);
261
375
 	if (ret) {
262
376
 		NV_ERROR(drm, "qndw%04x allocation failed: %d\n", oclass, ret);
263
377
 		return ret;