| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
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| 3 | 4 | * Copyright (C) 2013 Red Hat |
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| 4 | 5 | * Author: Rob Clark <robdclark@gmail.com> |
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| 5 | | - * |
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| 6 | | - * This program is free software; you can redistribute it and/or modify it |
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| 7 | | - * under the terms of the GNU General Public License version 2 as published by |
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| 8 | | - * the Free Software Foundation. |
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| 9 | | - * |
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| 10 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
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| 11 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 12 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 13 | | - * more details. |
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| 14 | | - * |
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| 15 | | - * You should have received a copy of the GNU General Public License along with |
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| 16 | | - * this program. If not, see <http://www.gnu.org/licenses/>. |
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| 17 | 6 | */ |
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| 18 | 7 | |
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| 19 | 8 | #ifndef __MSM_DRV_H__ |
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| .. | .. |
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| 33 | 22 | #include <linux/types.h> |
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| 34 | 23 | #include <linux/of_graph.h> |
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| 35 | 24 | #include <linux/of_device.h> |
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| 36 | | -#include <asm/sizes.h> |
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| 25 | +#include <linux/sizes.h> |
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| 37 | 26 | #include <linux/kthread.h> |
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| 38 | 27 | |
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| 39 | | -#include <drm/drmP.h> |
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| 40 | 28 | #include <drm/drm_atomic.h> |
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| 41 | 29 | #include <drm/drm_atomic_helper.h> |
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| 42 | | -#include <drm/drm_crtc_helper.h> |
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| 43 | 30 | #include <drm/drm_plane_helper.h> |
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| 31 | +#include <drm/drm_probe_helper.h> |
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| 44 | 32 | #include <drm/drm_fb_helper.h> |
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| 45 | 33 | #include <drm/msm_drm.h> |
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| 46 | 34 | #include <drm/drm_gem.h> |
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| .. | .. |
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| 68 | 56 | rwlock_t queuelock; |
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| 69 | 57 | struct list_head submitqueues; |
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| 70 | 58 | int queueid; |
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| 59 | + struct msm_gem_address_space *aspace; |
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| 60 | + struct kref ref; |
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| 61 | + int seqno; |
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| 71 | 62 | }; |
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| 72 | 63 | |
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| 73 | 64 | enum msm_mdp_plane_property { |
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| .. | .. |
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| 75 | 66 | PLANE_PROP_ALPHA, |
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| 76 | 67 | PLANE_PROP_PREMULTIPLIED, |
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| 77 | 68 | PLANE_PROP_MAX_NUM |
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| 78 | | -}; |
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| 79 | | - |
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| 80 | | -struct msm_vblank_ctrl { |
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| 81 | | - struct kthread_work work; |
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| 82 | | - struct list_head event_list; |
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| 83 | | - spinlock_t lock; |
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| 84 | 69 | }; |
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| 85 | 70 | |
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| 86 | 71 | #define MSM_GPU_MAX_RINGS 4 |
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| .. | .. |
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| 122 | 107 | u32 num_lm; |
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| 123 | 108 | u32 num_enc; |
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| 124 | 109 | u32 num_intf; |
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| 110 | + u32 num_dspp; |
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| 125 | 111 | }; |
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| 126 | 112 | |
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| 127 | 113 | /** |
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| 128 | 114 | * struct msm_display_info - defines display properties |
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| 129 | | - * @intf_type: DRM_MODE_CONNECTOR_ display type |
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| 115 | + * @intf_type: DRM_MODE_ENCODER_ type |
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| 130 | 116 | * @capabilities: Bitmask of display flags |
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| 131 | 117 | * @num_of_h_tiles: Number of horizontal tiles in case of split interface |
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| 132 | 118 | * @h_tile_instance: Controller instance used per tile. Number of elements is |
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| .. | .. |
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| 145 | 131 | /* Commit/Event thread specific structure */ |
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| 146 | 132 | struct msm_drm_thread { |
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| 147 | 133 | struct drm_device *dev; |
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| 148 | | - struct task_struct *thread; |
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| 149 | 134 | unsigned int crtc_id; |
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| 150 | | - struct kthread_worker worker; |
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| 135 | + struct kthread_worker *worker; |
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| 151 | 136 | }; |
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| 152 | 137 | |
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| 153 | 138 | struct msm_drm_private { |
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| .. | .. |
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| 176 | 161 | /* DSI is shared by mdp4 and mdp5 */ |
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| 177 | 162 | struct msm_dsi *dsi[2]; |
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| 178 | 163 | |
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| 164 | + struct msm_dp *dp; |
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| 165 | + |
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| 179 | 166 | /* when we have more than one 'msm_gpu' these need to be an array: */ |
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| 180 | 167 | struct msm_gpu *gpu; |
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| 181 | 168 | struct msm_file_private *lastctx; |
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| 169 | + /* gpu is only set on open(), but we need this info earlier */ |
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| 170 | + bool is_a2xx; |
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| 182 | 171 | |
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| 183 | 172 | struct drm_fb_helper *fbdev; |
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| 184 | 173 | |
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| .. | .. |
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| 189 | 178 | /* list of GEM objects: */ |
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| 190 | 179 | struct list_head inactive_list; |
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| 191 | 180 | |
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| 181 | + /* worker for delayed free of objects: */ |
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| 182 | + struct work_struct free_work; |
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| 183 | + struct llist_head free_list; |
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| 184 | + |
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| 192 | 185 | struct workqueue_struct *wq; |
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| 193 | 186 | |
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| 194 | 187 | unsigned int num_planes; |
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| .. | .. |
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| 197 | 190 | unsigned int num_crtcs; |
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| 198 | 191 | struct drm_crtc *crtcs[MAX_CRTCS]; |
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| 199 | 192 | |
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| 200 | | - struct msm_drm_thread disp_thread[MAX_CRTCS]; |
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| 201 | 193 | struct msm_drm_thread event_thread[MAX_CRTCS]; |
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| 202 | 194 | |
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| 203 | 195 | unsigned int num_encoders; |
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| .. | .. |
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| 226 | 218 | struct notifier_block vmap_notifier; |
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| 227 | 219 | struct shrinker shrinker; |
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| 228 | 220 | |
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| 229 | | - struct msm_vblank_ctrl vblank_ctrl; |
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| 230 | 221 | struct drm_atomic_state *pm_state; |
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| 231 | 222 | }; |
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| 232 | 223 | |
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| .. | .. |
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| 234 | 225 | uint32_t pixel_format; |
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| 235 | 226 | }; |
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| 236 | 227 | |
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| 228 | +struct msm_pending_timer; |
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| 229 | + |
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| 237 | 230 | int msm_atomic_prepare_fb(struct drm_plane *plane, |
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| 238 | 231 | struct drm_plane_state *new_state); |
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| 232 | +void msm_atomic_init_pending_timer(struct msm_pending_timer *timer, |
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| 233 | + struct msm_kms *kms, int crtc_idx); |
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| 239 | 234 | void msm_atomic_commit_tail(struct drm_atomic_state *state); |
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| 240 | 235 | struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); |
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| 241 | 236 | void msm_atomic_state_clear(struct drm_atomic_state *state); |
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| 242 | 237 | void msm_atomic_state_free(struct drm_atomic_state *state); |
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| 243 | 238 | |
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| 239 | +int msm_crtc_enable_vblank(struct drm_crtc *crtc); |
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| 240 | +void msm_crtc_disable_vblank(struct drm_crtc *crtc); |
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| 241 | + |
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| 242 | +int msm_gem_init_vma(struct msm_gem_address_space *aspace, |
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| 243 | + struct msm_gem_vma *vma, int npages, |
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| 244 | + u64 range_start, u64 range_end); |
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| 245 | +void msm_gem_purge_vma(struct msm_gem_address_space *aspace, |
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| 246 | + struct msm_gem_vma *vma); |
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| 244 | 247 | void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, |
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| 245 | | - struct msm_gem_vma *vma, struct sg_table *sgt); |
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| 248 | + struct msm_gem_vma *vma); |
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| 246 | 249 | int msm_gem_map_vma(struct msm_gem_address_space *aspace, |
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| 247 | | - struct msm_gem_vma *vma, struct sg_table *sgt, int npages); |
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| 250 | + struct msm_gem_vma *vma, int prot, |
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| 251 | + struct sg_table *sgt, int npages); |
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| 252 | +void msm_gem_close_vma(struct msm_gem_address_space *aspace, |
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| 253 | + struct msm_gem_vma *vma); |
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| 254 | + |
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| 255 | + |
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| 256 | +struct msm_gem_address_space * |
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| 257 | +msm_gem_address_space_get(struct msm_gem_address_space *aspace); |
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| 248 | 258 | |
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| 249 | 259 | void msm_gem_address_space_put(struct msm_gem_address_space *aspace); |
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| 250 | 260 | |
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| 251 | 261 | struct msm_gem_address_space * |
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| 252 | | -msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain, |
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| 253 | | - const char *name); |
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| 262 | +msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, |
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| 263 | + u64 va_start, u64 size); |
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| 254 | 264 | |
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| 255 | 265 | int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); |
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| 256 | 266 | void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); |
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| 267 | + |
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| 268 | +bool msm_use_mmu(struct drm_device *dev); |
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| 257 | 269 | |
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| 258 | 270 | void msm_gem_submit_free(struct msm_gem_submit *submit); |
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| 259 | 271 | int msm_ioctl_gem_submit(struct drm_device *dev, void *data, |
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| .. | .. |
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| 269 | 281 | uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj); |
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| 270 | 282 | int msm_gem_get_iova(struct drm_gem_object *obj, |
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| 271 | 283 | struct msm_gem_address_space *aspace, uint64_t *iova); |
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| 284 | +int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj, |
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| 285 | + struct msm_gem_address_space *aspace, uint64_t *iova, |
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| 286 | + u64 range_start, u64 range_end); |
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| 287 | +int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, |
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| 288 | + struct msm_gem_address_space *aspace, uint64_t *iova); |
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| 272 | 289 | uint64_t msm_gem_iova(struct drm_gem_object *obj, |
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| 290 | + struct msm_gem_address_space *aspace); |
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| 291 | +void msm_gem_unpin_iova(struct drm_gem_object *obj, |
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| 273 | 292 | struct msm_gem_address_space *aspace); |
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| 274 | 293 | struct page **msm_gem_get_pages(struct drm_gem_object *obj); |
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| 275 | 294 | void msm_gem_put_pages(struct drm_gem_object *obj); |
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| 276 | | -void msm_gem_put_iova(struct drm_gem_object *obj, |
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| 277 | | - struct msm_gem_address_space *aspace); |
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| 278 | 295 | int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev, |
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| 279 | 296 | struct drm_mode_create_dumb *args); |
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| 280 | 297 | int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, |
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| .. | .. |
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| 283 | 300 | void *msm_gem_prime_vmap(struct drm_gem_object *obj); |
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| 284 | 301 | void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); |
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| 285 | 302 | int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); |
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| 286 | | -struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj); |
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| 287 | 303 | struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, |
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| 288 | 304 | struct dma_buf_attachment *attach, struct sg_table *sg); |
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| 289 | 305 | int msm_gem_prime_pin(struct drm_gem_object *obj); |
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| .. | .. |
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| 294 | 310 | int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv); |
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| 295 | 311 | int msm_gem_sync_object(struct drm_gem_object *obj, |
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| 296 | 312 | struct msm_fence_context *fctx, bool exclusive); |
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| 297 | | -void msm_gem_move_to_active(struct drm_gem_object *obj, |
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| 298 | | - struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence); |
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| 299 | | -void msm_gem_move_to_inactive(struct drm_gem_object *obj); |
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| 313 | +void msm_gem_active_get(struct drm_gem_object *obj, struct msm_gpu *gpu); |
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| 314 | +void msm_gem_active_put(struct drm_gem_object *obj); |
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| 300 | 315 | int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout); |
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| 301 | 316 | int msm_gem_cpu_fini(struct drm_gem_object *obj); |
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| 302 | 317 | void msm_gem_free_object(struct drm_gem_object *obj); |
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| 303 | 318 | int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file, |
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| 304 | | - uint32_t size, uint32_t flags, uint32_t *handle); |
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| 319 | + uint32_t size, uint32_t flags, uint32_t *handle, char *name); |
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| 305 | 320 | struct drm_gem_object *msm_gem_new(struct drm_device *dev, |
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| 306 | 321 | uint32_t size, uint32_t flags); |
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| 307 | 322 | struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev, |
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| .. | .. |
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| 312 | 327 | void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size, |
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| 313 | 328 | uint32_t flags, struct msm_gem_address_space *aspace, |
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| 314 | 329 | struct drm_gem_object **bo, uint64_t *iova); |
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| 330 | +void msm_gem_kernel_put(struct drm_gem_object *bo, |
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| 331 | + struct msm_gem_address_space *aspace, bool locked); |
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| 315 | 332 | struct drm_gem_object *msm_gem_import(struct drm_device *dev, |
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| 316 | 333 | struct dma_buf *dmabuf, struct sg_table *sgt); |
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| 334 | +void msm_gem_free_work(struct work_struct *work); |
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| 335 | + |
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| 336 | +__printf(2, 3) |
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| 337 | +void msm_gem_object_set_name(struct drm_gem_object *bo, const char *fmt, ...); |
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| 317 | 338 | |
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| 318 | 339 | int msm_framebuffer_prepare(struct drm_framebuffer *fb, |
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| 319 | 340 | struct msm_gem_address_space *aspace); |
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| .. | .. |
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| 364 | 385 | } |
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| 365 | 386 | #endif |
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| 366 | 387 | |
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| 388 | +#ifdef CONFIG_DRM_MSM_DP |
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| 389 | +int __init msm_dp_register(void); |
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| 390 | +void __exit msm_dp_unregister(void); |
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| 391 | +int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, |
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| 392 | + struct drm_encoder *encoder); |
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| 393 | +int msm_dp_display_enable(struct msm_dp *dp, struct drm_encoder *encoder); |
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| 394 | +int msm_dp_display_disable(struct msm_dp *dp, struct drm_encoder *encoder); |
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| 395 | +int msm_dp_display_pre_disable(struct msm_dp *dp, struct drm_encoder *encoder); |
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| 396 | +void msm_dp_display_mode_set(struct msm_dp *dp, struct drm_encoder *encoder, |
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| 397 | + struct drm_display_mode *mode, |
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| 398 | + struct drm_display_mode *adjusted_mode); |
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| 399 | +void msm_dp_irq_postinstall(struct msm_dp *dp_display); |
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| 400 | + |
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| 401 | +void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor); |
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| 402 | + |
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| 403 | +#else |
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| 404 | +static inline int __init msm_dp_register(void) |
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| 405 | +{ |
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| 406 | + return -EINVAL; |
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| 407 | +} |
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| 408 | +static inline void __exit msm_dp_unregister(void) |
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| 409 | +{ |
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| 410 | +} |
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| 411 | +static inline int msm_dp_modeset_init(struct msm_dp *dp_display, |
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| 412 | + struct drm_device *dev, |
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| 413 | + struct drm_encoder *encoder) |
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| 414 | +{ |
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| 415 | + return -EINVAL; |
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| 416 | +} |
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| 417 | +static inline int msm_dp_display_enable(struct msm_dp *dp, |
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| 418 | + struct drm_encoder *encoder) |
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| 419 | +{ |
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| 420 | + return -EINVAL; |
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| 421 | +} |
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| 422 | +static inline int msm_dp_display_disable(struct msm_dp *dp, |
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| 423 | + struct drm_encoder *encoder) |
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| 424 | +{ |
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| 425 | + return -EINVAL; |
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| 426 | +} |
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| 427 | +static inline int msm_dp_display_pre_disable(struct msm_dp *dp, |
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| 428 | + struct drm_encoder *encoder) |
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| 429 | +{ |
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| 430 | + return -EINVAL; |
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| 431 | +} |
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| 432 | +static inline void msm_dp_display_mode_set(struct msm_dp *dp, |
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| 433 | + struct drm_encoder *encoder, |
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| 434 | + struct drm_display_mode *mode, |
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| 435 | + struct drm_display_mode *adjusted_mode) |
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| 436 | +{ |
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| 437 | +} |
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| 438 | + |
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| 439 | +static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display) |
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| 440 | +{ |
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| 441 | +} |
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| 442 | + |
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| 443 | +static inline void msm_dp_debugfs_init(struct msm_dp *dp_display, |
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| 444 | + struct drm_minor *minor) |
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| 445 | +{ |
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| 446 | +} |
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| 447 | + |
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| 448 | +#endif |
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| 449 | + |
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| 367 | 450 | void __init msm_mdp_register(void); |
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| 368 | 451 | void __exit msm_mdp_unregister(void); |
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| 369 | 452 | void __init msm_dpu_register(void); |
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| .. | .. |
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| 376 | 459 | int msm_debugfs_late_init(struct drm_device *dev); |
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| 377 | 460 | int msm_rd_debugfs_init(struct drm_minor *minor); |
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| 378 | 461 | void msm_rd_debugfs_cleanup(struct msm_drm_private *priv); |
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| 462 | +__printf(3, 4) |
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| 379 | 463 | void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
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| 380 | 464 | const char *fmt, ...); |
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| 381 | 465 | int msm_perf_debugfs_init(struct drm_minor *minor); |
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| 382 | 466 | void msm_perf_debugfs_cleanup(struct msm_drm_private *priv); |
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| 383 | 467 | #else |
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| 384 | 468 | static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; } |
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| 385 | | -static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
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| 386 | | - const char *fmt, ...) {} |
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| 469 | +__printf(3, 4) |
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| 470 | +static inline void msm_rd_dump_submit(struct msm_rd_state *rd, |
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| 471 | + struct msm_gem_submit *submit, |
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| 472 | + const char *fmt, ...) {} |
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| 387 | 473 | static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {} |
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| 388 | 474 | static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {} |
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| 389 | 475 | #endif |
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| 390 | 476 | |
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| 391 | 477 | struct clk *msm_clk_get(struct platform_device *pdev, const char *name); |
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| 392 | | -int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk); |
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| 393 | 478 | |
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| 394 | 479 | struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count, |
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| 395 | 480 | const char *name); |
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| 396 | 481 | void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, |
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| 482 | + const char *dbgname); |
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| 483 | +void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name, |
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| 397 | 484 | const char *dbgname); |
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| 398 | 485 | void msm_writel(u32 data, void __iomem *addr); |
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| 399 | 486 | u32 msm_readl(const void __iomem *addr); |
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| .. | .. |
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| 402 | 489 | int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx); |
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| 403 | 490 | struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx, |
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| 404 | 491 | u32 id); |
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| 405 | | -int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx, |
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| 492 | +int msm_submitqueue_create(struct drm_device *drm, |
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| 493 | + struct msm_file_private *ctx, |
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| 406 | 494 | u32 prio, u32 flags, u32 *id); |
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| 495 | +int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx, |
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| 496 | + struct drm_msm_submitqueue_query *args); |
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| 407 | 497 | int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id); |
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| 408 | 498 | void msm_submitqueue_close(struct msm_file_private *ctx); |
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| 409 | 499 | |
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| 410 | 500 | void msm_submitqueue_destroy(struct kref *kref); |
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| 411 | 501 | |
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| 502 | +static inline void __msm_file_private_destroy(struct kref *kref) |
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| 503 | +{ |
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| 504 | + struct msm_file_private *ctx = container_of(kref, |
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| 505 | + struct msm_file_private, ref); |
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| 506 | + |
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| 507 | + msm_gem_address_space_put(ctx->aspace); |
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| 508 | + kfree(ctx); |
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| 509 | +} |
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| 510 | + |
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| 511 | +static inline void msm_file_private_put(struct msm_file_private *ctx) |
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| 512 | +{ |
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| 513 | + kref_put(&ctx->ref, __msm_file_private_destroy); |
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| 514 | +} |
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| 515 | + |
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| 516 | +static inline struct msm_file_private *msm_file_private_get( |
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| 517 | + struct msm_file_private *ctx) |
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| 518 | +{ |
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| 519 | + kref_get(&ctx->ref); |
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| 520 | + return ctx; |
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| 521 | +} |
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| 412 | 522 | |
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| 413 | 523 | #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) |
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| 414 | 524 | #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) |
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| .. | .. |
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| 434 | 544 | static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) |
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| 435 | 545 | { |
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| 436 | 546 | ktime_t now = ktime_get(); |
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| 437 | | - unsigned long remaining_jiffies; |
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| 547 | + s64 remaining_jiffies; |
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| 438 | 548 | |
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| 439 | 549 | if (ktime_compare(*timeout, now) < 0) { |
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| 440 | 550 | remaining_jiffies = 0; |
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| 441 | 551 | } else { |
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| 442 | 552 | ktime_t rem = ktime_sub(*timeout, now); |
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| 443 | | - struct timespec ts = ktime_to_timespec(rem); |
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| 444 | | - remaining_jiffies = timespec_to_jiffies(&ts); |
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| 553 | + remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); |
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| 445 | 554 | } |
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| 446 | 555 | |
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| 447 | | - return remaining_jiffies; |
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| 556 | + return clamp(remaining_jiffies, 0LL, (s64)INT_MAX); |
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| 448 | 557 | } |
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| 449 | 558 | |
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| 450 | 559 | #endif /* __MSM_DRV_H__ */ |
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