forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/gpu/drm/msm/dsi/dsi_host.c
....@@ -1,31 +1,24 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 and
6
- * only version 2 as published by the Free Software Foundation.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
124  */
135 
146 #include <linux/clk.h>
157 #include <linux/delay.h>
8
+#include <linux/dma-mapping.h>
169 #include <linux/err.h>
17
-#include <linux/gpio.h>
1810 #include <linux/gpio/consumer.h>
1911 #include <linux/interrupt.h>
12
+#include <linux/mfd/syscon.h>
2013 #include <linux/of_device.h>
21
-#include <linux/of_gpio.h>
14
+#include <linux/of_graph.h>
2215 #include <linux/of_irq.h>
2316 #include <linux/pinctrl/consumer.h>
24
-#include <linux/of_graph.h>
17
+#include <linux/pm_opp.h>
18
+#include <linux/regmap.h>
2519 #include <linux/regulator/consumer.h>
2620 #include <linux/spinlock.h>
27
-#include <linux/mfd/syscon.h>
28
-#include <linux/regmap.h>
21
+
2922 #include <video/mipi_display.h>
3023 
3124 #include "dsi.h"
....@@ -118,6 +111,9 @@
118111 	struct clk *byte_clk_src;
119112 	struct clk *pixel_clk_src;
120113 	struct clk *byte_intf_clk;
114
+
115
+	struct opp_table *opp_table;
116
+	bool has_opp_table;
121117 
122118 	u32 byte_clk_rate;
123119 	u32 pixel_clk_rate;
....@@ -513,23 +509,24 @@
513509 	return dsi_bus_clk_enable(msm_host);
514510 }
515511 
516
-int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host)
512
+int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host)
517513 {
518514 	int ret;
519515 
520516 	DBG("Set clk rates: pclk=%d, byteclk=%d",
521517 		msm_host->mode->clock, msm_host->byte_clk_rate);
522518 
523
-	ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate);
519
+	ret = dev_pm_opp_set_rate(&msm_host->pdev->dev,
520
+				  msm_host->byte_clk_rate);
524521 	if (ret) {
525
-		pr_err("%s: Failed to set rate byte clk, %d\n", __func__, ret);
526
-		goto error;
522
+		pr_err("%s: dev_pm_opp_set_rate failed %d\n", __func__, ret);
523
+		return ret;
527524 	}
528525 
529526 	ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate);
530527 	if (ret) {
531528 		pr_err("%s: Failed to set rate pixel clk, %d\n", __func__, ret);
532
-		goto error;
529
+		return ret;
533530 	}
534531 
535532 	if (msm_host->byte_intf_clk) {
....@@ -538,9 +535,17 @@
538535 		if (ret) {
539536 			pr_err("%s: Failed to set rate byte intf clk, %d\n",
540537 			       __func__, ret);
541
-			goto error;
538
+			return ret;
542539 		}
543540 	}
541
+
542
+	return 0;
543
+}
544
+
545
+
546
+int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host)
547
+{
548
+	int ret;
544549 
545550 	ret = clk_prepare_enable(msm_host->esc_clk);
546551 	if (ret) {
....@@ -581,7 +586,7 @@
581586 	return ret;
582587 }
583588 
584
-int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host)
589
+int dsi_link_clk_set_rate_v2(struct msm_dsi_host *msm_host)
585590 {
586591 	int ret;
587592 
....@@ -592,26 +597,33 @@
592597 	ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate);
593598 	if (ret) {
594599 		pr_err("%s: Failed to set rate byte clk, %d\n", __func__, ret);
595
-		goto error;
600
+		return ret;
596601 	}
597602 
598603 	ret = clk_set_rate(msm_host->esc_clk, msm_host->esc_clk_rate);
599604 	if (ret) {
600605 		pr_err("%s: Failed to set rate esc clk, %d\n", __func__, ret);
601
-		goto error;
606
+		return ret;
602607 	}
603608 
604609 	ret = clk_set_rate(msm_host->src_clk, msm_host->src_clk_rate);
605610 	if (ret) {
606611 		pr_err("%s: Failed to set rate src clk, %d\n", __func__, ret);
607
-		goto error;
612
+		return ret;
608613 	}
609614 
610615 	ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate);
611616 	if (ret) {
612617 		pr_err("%s: Failed to set rate pixel clk, %d\n", __func__, ret);
613
-		goto error;
618
+		return ret;
614619 	}
620
+
621
+	return 0;
622
+}
623
+
624
+int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host)
625
+{
626
+	int ret;
615627 
616628 	ret = clk_prepare_enable(msm_host->byte_clk);
617629 	if (ret) {
....@@ -651,6 +663,8 @@
651663 
652664 void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host)
653665 {
666
+	/* Drop the performance state vote */
667
+	dev_pm_opp_set_rate(&msm_host->pdev->dev, 0);
654668 	clk_disable_unprepare(msm_host->esc_clk);
655669 	clk_disable_unprepare(msm_host->pixel_clk);
656670 	if (msm_host->byte_intf_clk)
....@@ -826,7 +840,7 @@
826840 	u32 flags = msm_host->mode_flags;
827841 	enum mipi_dsi_pixel_format mipi_fmt = msm_host->format;
828842 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
829
-	u32 data = 0;
843
+	u32 data = 0, lane_ctrl = 0;
830844 
831845 	if (!enable) {
832846 		dsi_write(msm_host, REG_DSI_CTRL, 0);
....@@ -914,9 +928,11 @@
914928 	dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL,
915929 		  DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(msm_host->dlane_swap));
916930 
917
-	if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
931
+	if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) {
932
+		lane_ctrl = dsi_read(msm_host, REG_DSI_LANE_CTRL);
918933 		dsi_write(msm_host, REG_DSI_LANE_CTRL,
919
-			DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST);
934
+			lane_ctrl | DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST);
935
+	}
920936 
921937 	data |= DSI_CTRL_ENABLE;
922938 
....@@ -977,16 +993,16 @@
977993 		/* image data and 1 byte write_memory_start cmd */
978994 		wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1;
979995 
980
-		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM_CTRL,
981
-			DSI_CMD_MDP_STREAM_CTRL_WORD_COUNT(wc) |
982
-			DSI_CMD_MDP_STREAM_CTRL_VIRTUAL_CHANNEL(
996
+		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL,
997
+			DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) |
998
+			DSI_CMD_MDP_STREAM0_CTRL_VIRTUAL_CHANNEL(
983999 					msm_host->channel) |
984
-			DSI_CMD_MDP_STREAM_CTRL_DATA_TYPE(
1000
+			DSI_CMD_MDP_STREAM0_CTRL_DATA_TYPE(
9851001 					MIPI_DSI_DCS_LONG_WRITE));
9861002 
987
-		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM_TOTAL,
988
-			DSI_CMD_MDP_STREAM_TOTAL_H_TOTAL(hdisplay) |
989
-			DSI_CMD_MDP_STREAM_TOTAL_V_TOTAL(mode->vdisplay));
1003
+		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
1004
+			DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
1005
+			DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
9901006 	}
9911007 }
9921008 
....@@ -1051,8 +1067,8 @@
10511067 	ret = wait_for_completion_timeout(&msm_host->video_comp,
10521068 			msecs_to_jiffies(70));
10531069 
1054
-	if (ret <= 0)
1055
-		dev_err(dev, "wait for video done timed out\n");
1070
+	if (ret == 0)
1071
+		DRM_DEV_ERROR(dev, "wait for video done timed out\n");
10561072 
10571073 	dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_VIDEO_DONE, 0);
10581074 }
....@@ -1084,6 +1100,8 @@
10841100 		msm_host->tx_gem_obj = NULL;
10851101 		return PTR_ERR(data);
10861102 	}
1103
+
1104
+	msm_gem_object_set_name(msm_host->tx_gem_obj, "tx_gem");
10871105 
10881106 	msm_host->tx_size = msm_host->tx_gem_obj->size;
10891107 
....@@ -1120,8 +1138,8 @@
11201138 
11211139 	priv = dev->dev_private;
11221140 	if (msm_host->tx_gem_obj) {
1123
-		msm_gem_put_iova(msm_host->tx_gem_obj, priv->kms->aspace);
1124
-		drm_gem_object_put_unlocked(msm_host->tx_gem_obj);
1141
+		msm_gem_unpin_iova(msm_host->tx_gem_obj, priv->kms->aspace);
1142
+		drm_gem_object_put(msm_host->tx_gem_obj);
11251143 		msm_host->tx_gem_obj = NULL;
11261144 	}
11271145 
....@@ -1250,7 +1268,7 @@
12501268 	if (!dma_base)
12511269 		return -EINVAL;
12521270 
1253
-	return msm_gem_get_iova(msm_host->tx_gem_obj,
1271
+	return msm_gem_get_and_pin_iova(msm_host->tx_gem_obj,
12541272 				priv->kms->aspace, dma_base);
12551273 }
12561274 
....@@ -1299,14 +1317,13 @@
12991317 static int dsi_cmd_dma_rx(struct msm_dsi_host *msm_host,
13001318 			u8 *buf, int rx_byte, int pkt_size)
13011319 {
1302
-	u32 *lp, *temp, data;
1320
+	u32 *temp, data;
13031321 	int i, j = 0, cnt;
13041322 	u32 read_cnt;
13051323 	u8 reg[16];
13061324 	int repeated_bytes = 0;
13071325 	int buf_offset = buf - msm_host->rx_buf;
13081326 
1309
-	lp = (u32 *)buf;
13101327 	temp = (u32 *)reg;
13111328 	cnt = (rx_byte + 3) >> 2;
13121329 	if (cnt > 4)
....@@ -1354,10 +1371,10 @@
13541371 			dsi_get_bpp(msm_host->format) / 8;
13551372 
13561373 	len = dsi_cmd_dma_add(msm_host, msg);
1357
-	if (!len) {
1374
+	if (len < 0) {
13581375 		pr_err("%s: failed to add cmd type = 0x%x\n",
13591376 			__func__,  msg->type);
1360
-		return -EINVAL;
1377
+		return len;
13611378 	}
13621379 
13631380 	/* for video mode, do not send cmds more than
....@@ -1376,10 +1393,14 @@
13761393 	}
13771394 
13781395 	ret = dsi_cmd_dma_tx(msm_host, len);
1379
-	if (ret < len) {
1380
-		pr_err("%s: cmd dma tx failed, type=0x%x, data0=0x%x, len=%d\n",
1381
-			__func__, msg->type, (*(u8 *)(msg->tx_buf)), len);
1382
-		return -ECOMM;
1396
+	if (ret < 0) {
1397
+		pr_err("%s: cmd dma tx failed, type=0x%x, data0=0x%x, len=%d, ret=%d\n",
1398
+			__func__, msg->type, (*(u8 *)(msg->tx_buf)), len, ret);
1399
+		return ret;
1400
+	} else if (ret < len) {
1401
+		pr_err("%s: cmd dma tx failed, type=0x%x, data0=0x%x, ret=%d len=%d\n",
1402
+			__func__, msg->type, (*(u8 *)(msg->tx_buf)), ret, len);
1403
+		return -EIO;
13831404 	}
13841405 
13851406 	return len;
....@@ -1598,8 +1619,6 @@
15981619 	msm_host->format = dsi->format;
15991620 	msm_host->mode_flags = dsi->mode_flags;
16001621 
1601
-	msm_dsi_manager_attach_dsi_device(msm_host->id, dsi->mode_flags);
1602
-
16031622 	/* Some gpios defined in panel DT need to be controlled by host */
16041623 	ret = dsi_host_init_panel_gpios(msm_host, &dsi->dev);
16051624 	if (ret)
....@@ -1675,7 +1694,7 @@
16751694 
16761695 	prop = of_find_property(ep, "data-lanes", &len);
16771696 	if (!prop) {
1678
-		dev_dbg(dev,
1697
+		DRM_DEV_DEBUG(dev,
16791698 			"failed to find data lane mapping, using default\n");
16801699 		/* Set the number of date lanes to 4 by default. */
16811700 		msm_host->num_data_lanes = 4;
....@@ -1685,7 +1704,7 @@
16851704 	num_lanes = len / sizeof(u32);
16861705 
16871706 	if (num_lanes < 1 || num_lanes > 4) {
1688
-		dev_err(dev, "bad number of data lanes\n");
1707
+		DRM_DEV_ERROR(dev, "bad number of data lanes\n");
16891708 		return -EINVAL;
16901709 	}
16911710 
....@@ -1694,7 +1713,7 @@
16941713 	ret = of_property_read_u32_array(ep, "data-lanes", lane_map,
16951714 					 num_lanes);
16961715 	if (ret) {
1697
-		dev_err(dev, "failed to read lane data\n");
1716
+		DRM_DEV_ERROR(dev, "failed to read lane data\n");
16981717 		return ret;
16991718 	}
17001719 
....@@ -1715,7 +1734,7 @@
17151734 		 */
17161735 		for (j = 0; j < num_lanes; j++) {
17171736 			if (lane_map[j] < 0 || lane_map[j] > 3)
1718
-				dev_err(dev, "bad physical lane entry %u\n",
1737
+				DRM_DEV_ERROR(dev, "bad physical lane entry %u\n",
17191738 					lane_map[j]);
17201739 
17211740 			if (swap[lane_map[j]] != j)
....@@ -1746,21 +1765,23 @@
17461765 	 */
17471766 	endpoint = of_graph_get_endpoint_by_regs(np, 1, -1);
17481767 	if (!endpoint) {
1749
-		dev_dbg(dev, "%s: no endpoint\n", __func__);
1768
+		DRM_DEV_DEBUG(dev, "%s: no endpoint\n", __func__);
17501769 		return 0;
17511770 	}
17521771 
17531772 	ret = dsi_host_parse_lane_data(msm_host, endpoint);
17541773 	if (ret) {
1755
-		dev_err(dev, "%s: invalid lane configuration %d\n",
1774
+		DRM_DEV_ERROR(dev, "%s: invalid lane configuration %d\n",
17561775 			__func__, ret);
1776
+		ret = -EINVAL;
17571777 		goto err;
17581778 	}
17591779 
17601780 	/* Get panel node from the output port's endpoint data */
17611781 	device_node = of_graph_get_remote_node(np, 1, 0);
17621782 	if (!device_node) {
1763
-		dev_dbg(dev, "%s: no valid device\n", __func__);
1783
+		DRM_DEV_DEBUG(dev, "%s: no valid device\n", __func__);
1784
+		ret = -ENODEV;
17641785 		goto err;
17651786 	}
17661787 
....@@ -1770,7 +1791,7 @@
17701791 		msm_host->sfpb = syscon_regmap_lookup_by_phandle(np,
17711792 					"syscon-sfpb");
17721793 		if (IS_ERR(msm_host->sfpb)) {
1773
-			dev_err(dev, "%s: failed to get sfpb regmap\n",
1794
+			DRM_DEV_ERROR(dev, "%s: failed to get sfpb regmap\n",
17741795 				__func__);
17751796 			ret = PTR_ERR(msm_host->sfpb);
17761797 		}
....@@ -1871,6 +1892,19 @@
18711892 		goto fail;
18721893 	}
18731894 
1895
+	msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "byte");
1896
+	if (IS_ERR(msm_host->opp_table))
1897
+		return PTR_ERR(msm_host->opp_table);
1898
+	/* OPP table is optional */
1899
+	ret = dev_pm_opp_of_add_table(&pdev->dev);
1900
+	if (!ret) {
1901
+		msm_host->has_opp_table = true;
1902
+	} else if (ret != -ENODEV) {
1903
+		dev_err(&pdev->dev, "invalid OPP table in device tree\n");
1904
+		dev_pm_opp_put_clkname(msm_host->opp_table);
1905
+		return ret;
1906
+	}
1907
+
18741908 	init_completion(&msm_host->dma_comp);
18751909 	init_completion(&msm_host->video_comp);
18761910 	mutex_init(&msm_host->dev_mutex);
....@@ -1879,6 +1913,9 @@
18791913 
18801914 	/* setup workqueue */
18811915 	msm_host->workqueue = alloc_ordered_workqueue("dsi_drm_work", 0);
1916
+	if (!msm_host->workqueue)
1917
+		return -ENOMEM;
1918
+
18821919 	INIT_WORK(&msm_host->err_work, dsi_err_worker);
18831920 	INIT_WORK(&msm_host->hpd_work, dsi_hpd_worker);
18841921 
....@@ -1906,6 +1943,9 @@
19061943 	mutex_destroy(&msm_host->cmd_mutex);
19071944 	mutex_destroy(&msm_host->dev_mutex);
19081945 
1946
+	if (msm_host->has_opp_table)
1947
+		dev_pm_opp_of_remove_table(&msm_host->pdev->dev);
1948
+	dev_pm_opp_put_clkname(msm_host->opp_table);
19091949 	pm_runtime_disable(&msm_host->pdev->dev);
19101950 }
19111951 
....@@ -1920,7 +1960,7 @@
19201960 	msm_host->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
19211961 	if (msm_host->irq < 0) {
19221962 		ret = msm_host->irq;
1923
-		dev_err(dev->dev, "failed to get irq: %d\n", ret);
1963
+		DRM_DEV_ERROR(dev->dev, "failed to get irq: %d\n", ret);
19241964 		return ret;
19251965 	}
19261966 
....@@ -1928,7 +1968,7 @@
19281968 			dsi_host_irq, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
19291969 			"dsi_isr", msm_host);
19301970 	if (ret < 0) {
1931
-		dev_err(&pdev->dev, "failed to request IRQ%u: %d\n",
1971
+		DRM_DEV_ERROR(&pdev->dev, "failed to request IRQ%u: %d\n",
19321972 				msm_host->irq, ret);
19331973 		return ret;
19341974 	}
....@@ -2005,6 +2045,7 @@
20052045 	 * mdp clock need to be enabled to receive dsi interrupt
20062046 	 */
20072047 	pm_runtime_get_sync(&msm_host->pdev->dev);
2048
+	cfg_hnd->ops->link_clk_set_rate(msm_host);
20082049 	cfg_hnd->ops->link_clk_enable(msm_host);
20092050 
20102051 	/* TODO: vote for bus bandwidth */
....@@ -2105,9 +2146,12 @@
21052146 		}
21062147 
21072148 		ret = dsi_cmds2buf_tx(msm_host, msg);
2108
-		if (ret < msg->tx_len) {
2149
+		if (ret < 0) {
21092150 			pr_err("%s: Read cmd Tx failed, %d\n", __func__, ret);
21102151 			return ret;
2152
+		} else if (ret < msg->tx_len) {
2153
+			pr_err("%s: Read cmd Tx failed, too short: %d\n", __func__, ret);
2154
+			return -ECOMM;
21112155 		}
21122156 
21132157 		/*
....@@ -2353,7 +2397,9 @@
23532397 	}
23542398 
23552399 	pm_runtime_get_sync(&msm_host->pdev->dev);
2356
-	ret = cfg_hnd->ops->link_clk_enable(msm_host);
2400
+	ret = cfg_hnd->ops->link_clk_set_rate(msm_host);
2401
+	if (!ret)
2402
+		ret = cfg_hnd->ops->link_clk_enable(msm_host);
23572403 	if (ret) {
23582404 		pr_err("%s: failed to enable link clocks. ret=%d\n",
23592405 		       __func__, ret);
....@@ -2424,7 +2470,7 @@
24242470 }
24252471 
24262472 int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
2427
-					struct drm_display_mode *mode)
2473
+				  const struct drm_display_mode *mode)
24282474 {
24292475 	struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
24302476 
....@@ -2442,17 +2488,14 @@
24422488 	return 0;
24432489 }
24442490 
2445
-struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host,
2446
-				unsigned long *panel_flags)
2491
+struct drm_panel *msm_dsi_host_get_panel(struct mipi_dsi_host *host)
24472492 {
2448
-	struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
2449
-	struct drm_panel *panel;
2493
+	return of_drm_find_panel(to_msm_dsi_host(host)->device_node);
2494
+}
24502495 
2451
-	panel = of_drm_find_panel(msm_host->device_node);
2452
-	if (panel_flags)
2453
-			*panel_flags = msm_host->mode_flags;
2454
-
2455
-	return panel;
2496
+unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host)
2497
+{
2498
+	return to_msm_dsi_host(host)->mode_flags;
24562499 }
24572500 
24582501 struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host)