disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
..
..
@@ -1,23 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (C) 2014 Red Hat
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  * Author: Rob Clark <robdclark@gmail.com>
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  * Author: Vinay Simha <vinaysimha@inforcecomputing.com>
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License version 2 as published by
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- * the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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- * You should have received a copy of the GNU General Public License along with
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- * this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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7
 
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+#include <linux/delay.h>
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+
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 #include <drm/drm_crtc.h>
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-#include <drm/drm_crtc_helper.h>
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+#include <drm/drm_probe_helper.h>
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12
 
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 #include "mdp4_kms.h"
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14
 
..
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@@ -39,51 +30,10 @@
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 	return to_mdp4_kms(to_mdp_kms(priv->kms));
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 }
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-#ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING
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-#include <mach/board.h>
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-static void bs_init(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder)
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-{
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-	struct drm_device *dev = mdp4_lcdc_encoder->base.dev;
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-	struct lcdc_platform_data *lcdc_pdata = mdp4_find_pdata("lvds.0");
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-
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-	if (!lcdc_pdata) {
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-		dev_err(dev->dev, "could not find lvds pdata\n");
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-		return;
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-	}
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-
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-	if (lcdc_pdata->bus_scale_table) {
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-		mdp4_lcdc_encoder->bsc = msm_bus_scale_register_client(
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-				lcdc_pdata->bus_scale_table);
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-		DBG("lvds : bus scale client: %08x", mdp4_lcdc_encoder->bsc);
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-	}
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-}
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-
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-static void bs_fini(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder)
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-{
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-	if (mdp4_lcdc_encoder->bsc) {
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-		msm_bus_scale_unregister_client(mdp4_lcdc_encoder->bsc);
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-		mdp4_lcdc_encoder->bsc = 0;
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-	}
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-}
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-
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-static void bs_set(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder, int idx)
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-{
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-	if (mdp4_lcdc_encoder->bsc) {
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-		DBG("set bus scaling: %d", idx);
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-		msm_bus_scale_client_update_request(mdp4_lcdc_encoder->bsc, idx);
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-	}
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-}
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-#else
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-static void bs_init(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder) {}
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-static void bs_fini(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder) {}
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-static void bs_set(struct mdp4_lcdc_encoder *mdp4_lcdc_encoder, int idx) {}
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-#endif
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-
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33
 static void mdp4_lcdc_encoder_destroy(struct drm_encoder *encoder)
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 {
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 	struct mdp4_lcdc_encoder *mdp4_lcdc_encoder =
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 			to_mdp4_lcdc_encoder(encoder);
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-	bs_fini(mdp4_lcdc_encoder);
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 	drm_encoder_cleanup(encoder);
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 	kfree(mdp4_lcdc_encoder);
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39
 }
..
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@@ -224,7 +174,7 @@
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 		break;
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175
 
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 	default:
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-		dev_err(dev->dev, "unknown bpp: %d\n", bpp);
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+		DRM_DEV_ERROR(dev->dev, "unknown bpp: %d\n", bpp);
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 		return;
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 	}
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180
 
..
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@@ -241,7 +191,7 @@
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 				MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN;
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192
 		break;
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 	default:
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-		dev_err(dev->dev, "unknown # of channels: %d\n", nchan);
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+		DRM_DEV_ERROR(dev->dev, "unknown # of channels: %d\n", nchan);
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 		return;
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196
 	}
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197
 
..
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@@ -273,14 +223,7 @@
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223
 
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 	mode = adjusted_mode;
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225
 
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-	DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
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-			mode->base.id, mode->name,
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-			mode->vrefresh, mode->clock,
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-			mode->hdisplay, mode->hsync_start,
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-			mode->hsync_end, mode->htotal,
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-			mode->vdisplay, mode->vsync_start,
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-			mode->vsync_end, mode->vtotal,
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-			mode->type, mode->flags);
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+	DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
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227
 
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 	mdp4_lcdc_encoder->pixclock = mode->clock * 1000;
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229
 
..
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@@ -361,10 +304,8 @@
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 	for (i = 0; i < ARRAY_SIZE(mdp4_lcdc_encoder->regs); i++) {
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 		ret = regulator_disable(mdp4_lcdc_encoder->regs[i]);
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 		if (ret)
364
-			dev_err(dev->dev, "failed to disable regulator: %d\n", ret);
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+			DRM_DEV_ERROR(dev->dev, "failed to disable regulator: %d\n", ret);
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308
 	}
366
-
367
-	bs_set(mdp4_lcdc_encoder, 0);
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309
 
369
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 	mdp4_lcdc_encoder->enabled = false;
370
311
 }
..
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@@ -377,37 +318,40 @@
377
318
 	unsigned long pc = mdp4_lcdc_encoder->pixclock;
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319
 	struct mdp4_kms *mdp4_kms = get_kms(encoder);
379
320
 	struct drm_panel *panel;
321
+	uint32_t config;
380
322
 	int i, ret;
381
323
 
382
324
 	if (WARN_ON(mdp4_lcdc_encoder->enabled))
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325
 		return;
384
326
 
385
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 	/* TODO: hard-coded for 18bpp: */
386
-	mdp4_crtc_set_config(encoder->crtc,
387
-			MDP4_DMA_CONFIG_R_BPC(BPC6) |
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-			MDP4_DMA_CONFIG_G_BPC(BPC6) |
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-			MDP4_DMA_CONFIG_B_BPC(BPC6) |
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-			MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
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-			MDP4_DMA_CONFIG_PACK(0x21) |
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-			MDP4_DMA_CONFIG_DEFLKR_EN |
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-			MDP4_DMA_CONFIG_DITHER_EN);
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-	mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
328
+	config =
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+		MDP4_DMA_CONFIG_R_BPC(BPC6) |
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+		MDP4_DMA_CONFIG_G_BPC(BPC6) |
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+		MDP4_DMA_CONFIG_B_BPC(BPC6) |
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+		MDP4_DMA_CONFIG_PACK(0x21) |
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+		MDP4_DMA_CONFIG_DEFLKR_EN |
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+		MDP4_DMA_CONFIG_DITHER_EN;
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335
 
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-	bs_set(mdp4_lcdc_encoder, 1);
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+	if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb"))
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+		config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;
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+
339
+	mdp4_crtc_set_config(encoder->crtc, config);
340
+	mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
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341
 
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 	for (i = 0; i < ARRAY_SIZE(mdp4_lcdc_encoder->regs); i++) {
399
343
 		ret = regulator_enable(mdp4_lcdc_encoder->regs[i]);
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344
 		if (ret)
401
-			dev_err(dev->dev, "failed to enable regulator: %d\n", ret);
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+			DRM_DEV_ERROR(dev->dev, "failed to enable regulator: %d\n", ret);
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346
 	}
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347
 
404
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 	DBG("setting lcdc_clk=%lu", pc);
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 	ret = clk_set_rate(mdp4_lcdc_encoder->lcdc_clk, pc);
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350
 	if (ret)
407
-		dev_err(dev->dev, "failed to configure lcdc_clk: %d\n", ret);
351
+		DRM_DEV_ERROR(dev->dev, "failed to configure lcdc_clk: %d\n", ret);
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352
 	ret = clk_prepare_enable(mdp4_lcdc_encoder->lcdc_clk);
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 	if (ret)
410
-		dev_err(dev->dev, "failed to enable lcdc_clk: %d\n", ret);
354
+		DRM_DEV_ERROR(dev->dev, "failed to enable lcdc_clk: %d\n", ret);
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355
 
412
356
 	panel = of_drm_find_panel(mdp4_lcdc_encoder->panel_node);
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357
 	if (!IS_ERR(panel)) {
..
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@@ -461,7 +405,7 @@
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 	/* TODO: do we need different pll in other cases? */
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 	mdp4_lcdc_encoder->lcdc_clk = mpd4_lvds_pll_init(dev);
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407
 	if (IS_ERR(mdp4_lcdc_encoder->lcdc_clk)) {
464
-		dev_err(dev->dev, "failed to get lvds_clk\n");
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+		DRM_DEV_ERROR(dev->dev, "failed to get lvds_clk\n");
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409
 		ret = PTR_ERR(mdp4_lcdc_encoder->lcdc_clk);
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 		goto fail;
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411
 	}
..
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@@ -470,7 +414,7 @@
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 	reg = devm_regulator_get(dev->dev, "lvds-vccs-3p3v");
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 	if (IS_ERR(reg)) {
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 		ret = PTR_ERR(reg);
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-		dev_err(dev->dev, "failed to get lvds-vccs-3p3v: %d\n", ret);
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+		DRM_DEV_ERROR(dev->dev, "failed to get lvds-vccs-3p3v: %d\n", ret);
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 		goto fail;
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419
 	}
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420
 	mdp4_lcdc_encoder->regs[0] = reg;
..
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@@ -478,7 +422,7 @@
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422
 	reg = devm_regulator_get(dev->dev, "lvds-pll-vdda");
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 	if (IS_ERR(reg)) {
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 		ret = PTR_ERR(reg);
481
-		dev_err(dev->dev, "failed to get lvds-pll-vdda: %d\n", ret);
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+		DRM_DEV_ERROR(dev->dev, "failed to get lvds-pll-vdda: %d\n", ret);
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426
 		goto fail;
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427
 	}
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428
 	mdp4_lcdc_encoder->regs[1] = reg;
..
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@@ -486,12 +430,10 @@
486
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 	reg = devm_regulator_get(dev->dev, "lvds-vdda");
487
431
 	if (IS_ERR(reg)) {
488
432
 		ret = PTR_ERR(reg);
489
-		dev_err(dev->dev, "failed to get lvds-vdda: %d\n", ret);
433
+		DRM_DEV_ERROR(dev->dev, "failed to get lvds-vdda: %d\n", ret);
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 		goto fail;
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 	}
492
436
 	mdp4_lcdc_encoder->regs[2] = reg;
493
-
494
-	bs_init(mdp4_lcdc_encoder);
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437
 
496
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 	return encoder;
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