| .. | .. |
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| 45 | 45 | if (!ring) |
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| 46 | 46 | return; |
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| 47 | 47 | |
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| 48 | | - spin_lock_irqsave(&ring->lock, flags); |
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| 48 | + spin_lock_irqsave(&ring->preempt_lock, flags); |
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| 49 | 49 | wptr = get_wptr(ring); |
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| 50 | | - spin_unlock_irqrestore(&ring->lock, flags); |
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| 50 | + spin_unlock_irqrestore(&ring->preempt_lock, flags); |
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| 51 | 51 | |
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| 52 | 52 | gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); |
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| 53 | 53 | } |
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| .. | .. |
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| 62 | 62 | bool empty; |
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| 63 | 63 | struct msm_ringbuffer *ring = gpu->rb[i]; |
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| 64 | 64 | |
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| 65 | | - spin_lock_irqsave(&ring->lock, flags); |
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| 66 | | - empty = (get_wptr(ring) == ring->memptrs->rptr); |
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| 67 | | - spin_unlock_irqrestore(&ring->lock, flags); |
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| 65 | + spin_lock_irqsave(&ring->preempt_lock, flags); |
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| 66 | + empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring)); |
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| 67 | + spin_unlock_irqrestore(&ring->preempt_lock, flags); |
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| 68 | 68 | |
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| 69 | 69 | if (!empty) |
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| 70 | 70 | return ring; |
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| .. | .. |
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| 132 | 132 | } |
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| 133 | 133 | |
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| 134 | 134 | /* Make sure the wptr doesn't update while we're in motion */ |
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| 135 | | - spin_lock_irqsave(&ring->lock, flags); |
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| 135 | + spin_lock_irqsave(&ring->preempt_lock, flags); |
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| 136 | 136 | a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring); |
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| 137 | | - spin_unlock_irqrestore(&ring->lock, flags); |
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| 137 | + spin_unlock_irqrestore(&ring->preempt_lock, flags); |
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| 138 | 138 | |
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| 139 | 139 | /* Set the address of the incoming preemption record */ |
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| 140 | 140 | gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO, |
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| .. | .. |
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| 210 | 210 | a5xx_gpu->preempt[i]->wptr = 0; |
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| 211 | 211 | a5xx_gpu->preempt[i]->rptr = 0; |
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| 212 | 212 | a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova; |
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| 213 | + a5xx_gpu->preempt[i]->rptr_addr = shadowptr(a5xx_gpu, gpu->rb[i]); |
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| 213 | 214 | } |
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| 214 | 215 | |
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| 215 | 216 | /* Write a 0 to signal that we aren't switching pagetables */ |
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| .. | .. |
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| 261 | 262 | ptr->data = 0; |
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| 262 | 263 | ptr->cntl = MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE; |
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| 263 | 264 | |
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| 264 | | - ptr->rptr_addr = shadowptr(a5xx_gpu, ring); |
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| 265 | 265 | ptr->counter = counters_iova; |
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| 266 | 266 | |
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| 267 | 267 | return 0; |
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