| .. | .. |
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| 4 | 4 | * Copyright © 2018 Intel Corporation |
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| 5 | 5 | */ |
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| 6 | 6 | |
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| 7 | | -#include "../i915_drv.h" |
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| 7 | +#include "gt/intel_gt.h" |
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| 8 | +#include "gt/intel_gt_requests.h" |
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| 8 | 9 | |
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| 9 | | -#include "../i915_selftest.h" |
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| 10 | +#include "i915_drv.h" |
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| 11 | +#include "i915_selftest.h" |
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| 12 | + |
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| 10 | 13 | #include "igt_flush_test.h" |
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| 11 | 14 | |
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| 12 | | -int igt_flush_test(struct drm_i915_private *i915, unsigned int flags) |
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| 15 | +int igt_flush_test(struct drm_i915_private *i915) |
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| 13 | 16 | { |
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| 17 | + struct intel_gt *gt = &i915->gt; |
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| 18 | + int ret = intel_gt_is_wedged(gt) ? -EIO : 0; |
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| 19 | + |
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| 14 | 20 | cond_resched(); |
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| 15 | 21 | |
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| 16 | | - if (flags & I915_WAIT_LOCKED && |
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| 17 | | - i915_gem_switch_to_kernel_context(i915)) { |
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| 18 | | - pr_err("Failed to switch back to kernel context; declaring wedged\n"); |
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| 19 | | - i915_gem_set_wedged(i915); |
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| 20 | | - } |
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| 21 | | - |
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| 22 | | - if (i915_gem_wait_for_idle(i915, flags, HZ / 5) == -ETIME) { |
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| 22 | + if (intel_gt_wait_for_idle(gt, HZ / 5) == -ETIME) { |
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| 23 | 23 | pr_err("%pS timed out, cancelling all further testing.\n", |
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| 24 | 24 | __builtin_return_address(0)); |
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| 25 | 25 | |
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| 26 | | - GEM_TRACE("%pS timed out.\n", __builtin_return_address(0)); |
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| 26 | + GEM_TRACE("%pS timed out.\n", |
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| 27 | + __builtin_return_address(0)); |
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| 27 | 28 | GEM_TRACE_DUMP(); |
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| 28 | 29 | |
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| 29 | | - i915_gem_set_wedged(i915); |
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| 30 | + intel_gt_set_wedged(gt); |
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| 31 | + ret = -EIO; |
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| 30 | 32 | } |
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| 31 | 33 | |
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| 32 | | - return i915_terminally_wedged(&i915->gpu_error) ? -EIO : 0; |
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| 34 | + return ret; |
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| 33 | 35 | } |
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