disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/i915/i915_pmu.h
..
..
@@ -10,7 +10,7 @@
10
10
 #include <linux/hrtimer.h>
11
11
 #include <linux/perf_event.h>
12
12
 #include <linux/spinlock_types.h>
13
-#include <drm/i915_drm.h>
13
+#include <uapi/drm/i915_drm.h>
14
14
 
15
15
 struct drm_i915_private;
16
16
 
..
..
@@ -18,7 +18,7 @@
18
18
 	__I915_SAMPLE_FREQ_ACT = 0,
19
19
 	__I915_SAMPLE_FREQ_REQ,
20
20
 	__I915_SAMPLE_RC6,
21
-	__I915_SAMPLE_RC6_ESTIMATED,
21
+	__I915_SAMPLE_RC6_LAST_REPORTED,
22
22
 	__I915_NUM_PMU_SAMPLERS
23
23
 };
24
24
 
..
..
@@ -31,19 +31,28 @@
31
31
 	((1 << I915_PMU_SAMPLE_BITS) + \
32
32
 	 (I915_PMU_LAST + 1 - __I915_PMU_OTHER(0)))
33
33
 
34
+#define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
35
+
34
36
 struct i915_pmu_sample {
35
37
 	u64 cur;
36
38
 };
37
39
 
38
40
 struct i915_pmu {
39
41
 	/**
40
-	 * @node: List node for CPU hotplug handling.
42
+	 * @cpuhp: Struct used for CPU hotplug handling.
41
43
 	 */
42
-	struct hlist_node node;
44
+	struct {
45
+		struct hlist_node node;
46
+		enum cpuhp_state slot;
47
+	} cpuhp;
43
48
 	/**
44
49
 	 * @base: PMU base.
45
50
 	 */
46
51
 	struct pmu base;
52
+	/**
53
+	 * @name: Name as registered with perf core.
54
+	 */
55
+	const char *name;
47
56
 	/**
48
57
 	 * @lock: Lock protecting enable mask and ref count handling.
49
58
 	 */
..
..
@@ -95,9 +104,13 @@
95
104
 	 */
96
105
 	struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
97
106
 	/**
98
-	 * @suspended_jiffies_last: Cached suspend time from PM core.
107
+	 * @sleep_last: Last time GT parked for RC6 estimation.
99
108
 	 */
100
-	unsigned long suspended_jiffies_last;
109
+	ktime_t sleep_last;
110
+	/**
111
+	 * @events_attr_group: Device events attribute group.
112
+	 */
113
+	struct attribute_group events_attr_group;
101
114
 	/**
102
115
 	 * @i915_attr: Memory block holding device attributes.
103
116
 	 */