| .. | .. |
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| 36 | 36 | #ifndef _GVT_MMIO_H_ |
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| 37 | 37 | #define _GVT_MMIO_H_ |
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| 38 | 38 | |
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| 39 | +#include <linux/types.h> |
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| 40 | + |
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| 39 | 41 | struct intel_gvt; |
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| 40 | 42 | struct intel_vgpu; |
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| 41 | 43 | |
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| .. | .. |
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| 43 | 45 | #define D_SKL (1 << 1) |
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| 44 | 46 | #define D_KBL (1 << 2) |
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| 45 | 47 | #define D_BXT (1 << 3) |
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| 48 | +#define D_CFL (1 << 4) |
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| 46 | 49 | |
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| 47 | | -#define D_GEN9PLUS (D_SKL | D_KBL | D_BXT) |
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| 48 | | -#define D_GEN8PLUS (D_BDW | D_SKL | D_KBL | D_BXT) |
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| 50 | +#define D_GEN9PLUS (D_SKL | D_KBL | D_BXT | D_CFL) |
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| 51 | +#define D_GEN8PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) |
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| 49 | 52 | |
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| 50 | | -#define D_SKL_PLUS (D_SKL | D_KBL | D_BXT) |
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| 51 | | -#define D_BDW_PLUS (D_BDW | D_SKL | D_KBL | D_BXT) |
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| 53 | +#define D_SKL_PLUS (D_SKL | D_KBL | D_BXT | D_CFL) |
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| 54 | +#define D_BDW_PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) |
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| 52 | 55 | |
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| 53 | 56 | #define D_PRE_SKL (D_BDW) |
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| 54 | | -#define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT) |
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| 57 | +#define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) |
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| 55 | 58 | |
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| 56 | 59 | typedef int (*gvt_mmio_func)(struct intel_vgpu *, unsigned int, void *, |
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| 57 | 60 | unsigned int); |
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| .. | .. |
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| 66 | 69 | struct hlist_node node; |
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| 67 | 70 | }; |
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| 68 | 71 | |
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| 69 | | -int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt, |
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| 70 | | - unsigned int reg); |
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| 72 | +const struct intel_engine_cs * |
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| 73 | +intel_gvt_render_mmio_to_engine(struct intel_gvt *gvt, unsigned int reg); |
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| 71 | 74 | unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt); |
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| 72 | 75 | bool intel_gvt_match_device(struct intel_gvt *gvt, unsigned long device); |
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| 73 | 76 | |
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| .. | .. |
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| 101 | 104 | |
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| 102 | 105 | int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, |
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| 103 | 106 | void *p_data, unsigned int bytes); |
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| 107 | + |
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| 108 | +void intel_gvt_restore_fence(struct intel_gvt *gvt); |
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| 109 | +void intel_gvt_restore_mmio(struct intel_gvt *gvt); |
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| 110 | + |
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| 104 | 111 | #endif |
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