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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright © 2006-2007 Intel Corporation |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify it |
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| 5 | | - * under the terms and conditions of the GNU General Public License, |
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| 6 | | - * version 2, as published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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| 9 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 10 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 11 | | - * more details. |
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| 12 | | - * |
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| 13 | | - * You should have received a copy of the GNU General Public License along with |
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| 14 | | - * this program; if not, write to the Free Software Foundation, Inc., |
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| 15 | | - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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| 16 | 4 | * |
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| 17 | 5 | * Authors: |
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| 18 | 6 | * Eric Anholt <eric@anholt.net> |
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| 19 | 7 | */ |
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| 20 | 8 | |
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| 9 | +#include <linux/delay.h> |
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| 21 | 10 | #include <linux/i2c.h> |
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| 22 | 11 | #include <linux/pm_runtime.h> |
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| 23 | 12 | |
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| 24 | | -#include <drm/drmP.h> |
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| 25 | | -#include "psb_intel_reg.h" |
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| 26 | | -#include "gma_display.h" |
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| 13 | +#include <drm/drm_crtc.h> |
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| 14 | +#include <drm/drm_fourcc.h> |
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| 15 | + |
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| 27 | 16 | #include "framebuffer.h" |
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| 28 | | -#include "mdfld_output.h" |
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| 17 | +#include "gma_display.h" |
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| 29 | 18 | #include "mdfld_dsi_output.h" |
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| 19 | +#include "mdfld_output.h" |
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| 20 | +#include "psb_intel_reg.h" |
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| 30 | 21 | |
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| 31 | 22 | /* Hardcoded currently */ |
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| 32 | 23 | static int ksel = KSEL_CRYSTAL_19; |
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| .. | .. |
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| 122 | 113 | return (pfit_control >> 29) & 0x3; |
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| 123 | 114 | } |
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| 124 | 115 | |
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| 125 | | -static struct drm_device globle_dev; |
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| 126 | | - |
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| 127 | | -void mdfld__intel_plane_set_alpha(int enable) |
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| 128 | | -{ |
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| 129 | | - struct drm_device *dev = &globle_dev; |
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| 130 | | - int dspcntr_reg = DSPACNTR; |
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| 131 | | - u32 dspcntr; |
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| 132 | | - |
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| 133 | | - dspcntr = REG_READ(dspcntr_reg); |
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| 134 | | - |
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| 135 | | - if (enable) { |
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| 136 | | - dspcntr &= ~DISPPLANE_32BPP_NO_ALPHA; |
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| 137 | | - dspcntr |= DISPPLANE_32BPP; |
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| 138 | | - } else { |
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| 139 | | - dspcntr &= ~DISPPLANE_32BPP; |
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| 140 | | - dspcntr |= DISPPLANE_32BPP_NO_ALPHA; |
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| 141 | | - } |
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| 142 | | - |
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| 143 | | - REG_WRITE(dspcntr_reg, dspcntr); |
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| 144 | | -} |
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| 145 | | - |
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| 146 | 116 | static int check_fb(struct drm_framebuffer *fb) |
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| 147 | 117 | { |
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| 148 | 118 | if (!fb) |
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| .. | .. |
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| 172 | 142 | unsigned long start, offset; |
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| 173 | 143 | u32 dspcntr; |
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| 174 | 144 | int ret; |
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| 175 | | - |
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| 176 | | - memcpy(&globle_dev, dev, sizeof(struct drm_device)); |
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| 177 | 145 | |
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| 178 | 146 | dev_dbg(dev->dev, "pipe = 0x%x.\n", pipe); |
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| 179 | 147 | |
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| .. | .. |
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| 690 | 658 | |
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| 691 | 659 | dev_dbg(dev->dev, "pipe = 0x%x\n", pipe); |
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| 692 | 660 | |
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| 693 | | -#if 0 |
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| 694 | | - if (pipe == 1) { |
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| 695 | | - if (!gma_power_begin(dev, true)) |
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| 696 | | - return 0; |
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| 697 | | - android_hdmi_crtc_mode_set(crtc, mode, adjusted_mode, |
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| 698 | | - x, y, old_fb); |
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| 699 | | - goto mrst_crtc_mode_set_exit; |
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| 700 | | - } |
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| 701 | | -#endif |
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| 702 | | - |
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| 703 | 661 | ret = check_fb(crtc->primary->fb); |
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| 704 | 662 | if (ret) |
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| 705 | 663 | return ret; |
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| .. | .. |
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| 950 | 908 | } |
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| 951 | 909 | dpll = 0; |
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| 952 | 910 | |
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| 953 | | -#if 0 /* FIXME revisit later */ |
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| 954 | | - if (ksel == KSEL_CRYSTAL_19 || ksel == KSEL_BYPASS_19 || |
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| 955 | | - ksel == KSEL_BYPASS_25) |
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| 956 | | - dpll &= ~MDFLD_INPUT_REF_SEL; |
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| 957 | | - else if (ksel == KSEL_BYPASS_83_100) |
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| 958 | | - dpll |= MDFLD_INPUT_REF_SEL; |
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| 959 | | -#endif /* FIXME revisit later */ |
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| 960 | | - |
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| 961 | 911 | if (is_hdmi) |
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| 962 | 912 | dpll |= MDFLD_VCO_SEL; |
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| 963 | 913 | |
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| .. | .. |
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| 967 | 917 | /* compute bitmask from p1 value */ |
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| 968 | 918 | dpll |= (1 << (clock.p1 - 2)) << 17; |
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| 969 | 919 | |
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| 970 | | -#if 0 /* 1080p30 & 720p */ |
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| 971 | | - dpll = 0x00050000; |
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| 972 | | - fp = 0x000001be; |
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| 973 | | -#endif |
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| 974 | | -#if 0 /* 480p */ |
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| 975 | | - dpll = 0x02010000; |
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| 976 | | - fp = 0x000000d2; |
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| 977 | | -#endif |
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| 978 | 920 | } else { |
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| 979 | | -#if 0 /*DBI_TPO_480x864*/ |
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| 980 | | - dpll = 0x00020000; |
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| 981 | | - fp = 0x00000156; |
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| 982 | | -#endif /* DBI_TPO_480x864 */ /* get from spec. */ |
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| 983 | | - |
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| 984 | 921 | dpll = 0x00800000; |
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| 985 | 922 | fp = 0x000000c1; |
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| 986 | 923 | } |
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