disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
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@@ -52,11 +52,31 @@
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 	DP_COMPONENT_PIXEL_DEPTH_16BPC		= 0x00000004
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 };
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+struct audio_clock_info {
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+	/* pixel clock frequency*/
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+	uint32_t pixel_clock_in_10khz;
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+	/* N - 32KHz audio */
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+	uint32_t n_32khz;
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+	/* CTS - 32KHz audio*/
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+	uint32_t cts_32khz;
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+	uint32_t n_44khz;
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+	uint32_t cts_44khz;
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+	uint32_t n_48khz;
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+	uint32_t cts_48khz;
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+};
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+
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+enum dynamic_metadata_mode {
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+	dmdata_dp,
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+	dmdata_hdmi,
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+	dmdata_dolby_vision
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+};
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+
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 struct encoder_info_frame {
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 	/* auxiliary video information */
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 	struct dc_info_packet avi;
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 	struct dc_info_packet gamut;
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 	struct dc_info_packet vendor;
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+	struct dc_info_packet hfvsif;
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 	/* source product description */
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 	struct dc_info_packet spd;
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 	/* video stream configuration */
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@@ -67,7 +87,8 @@
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 struct encoder_unblank_param {
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 	struct dc_link_settings link_settings;
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-	unsigned int pixel_clk_khz;
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+	struct dc_crtc_timing timing;
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+	int opp_cnt;
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 };
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 struct encoder_set_dp_phy_pattern_param {
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@@ -82,13 +103,30 @@
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 	struct dc_context *ctx;
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 	struct dc_bios *bp;
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 	enum engine_id id;
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+	uint32_t stream_enc_inst;
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+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
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+	struct vpg *vpg;
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+	struct afmt *afmt;
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+#endif
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+};
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+
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+struct enc_state {
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+	uint32_t dsc_mode;  // DISABLED  0; 1 or 2 indicate enabled state.
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+	uint32_t dsc_slice_width;
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+	uint32_t sec_gsp_pps_line_num;
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+	uint32_t vbid6_line_reference;
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+	uint32_t vbid6_line_num;
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+	uint32_t sec_gsp_pps_enable;
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+	uint32_t sec_stream_enable;
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 };
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 struct stream_encoder_funcs {
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 	void (*dp_set_stream_attribute)(
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 		struct stream_encoder *enc,
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 		struct dc_crtc_timing *crtc_timing,
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-		enum dc_color_space output_color_space);
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+		enum dc_color_space output_color_space,
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+		bool use_vsc_sdp_for_colorimetry,
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+		uint32_t enable_sdp_splitting);
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 	void (*hdmi_set_stream_attribute)(
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 		struct stream_encoder *enc,
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@@ -101,7 +139,11 @@
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 		struct dc_crtc_timing *crtc_timing,
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 		bool is_dual_link);
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-	void (*set_mst_bandwidth)(
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+	void (*lvds_set_stream_attribute)(
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+		struct stream_encoder *enc,
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+		struct dc_crtc_timing *crtc_timing);
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+
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+	void (*set_throttled_vcp_size)(
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 		struct stream_encoder *enc,
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 		struct fixed31_32 avg_time_slots_per_mtp);
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@@ -115,6 +157,11 @@
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 	void (*update_dp_info_packets)(
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 		struct stream_encoder *enc,
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 		const struct encoder_info_frame *info_frame);
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+
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+	void (*send_immediate_sdp_message)(
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+				struct stream_encoder *enc,
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+				const uint8_t *custom_sdp_message,
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+				unsigned int sdp_message_size);
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 	void (*stop_dp_info_packets)(
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 		struct stream_encoder *enc);
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@@ -157,6 +204,41 @@
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 	void (*set_avmute)(
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 		struct stream_encoder *enc, bool enable);
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+	void (*dig_connect_to_otg)(
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+		struct stream_encoder *enc,
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+		int tg_inst);
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+
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+	void (*hdmi_reset_stream_attribute)(
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+		struct stream_encoder *enc);
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+
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+	unsigned int (*dig_source_otg)(
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+		struct stream_encoder *enc);
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+
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+	bool (*dp_get_pixel_format)(
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+		struct stream_encoder *enc,
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+		enum dc_pixel_encoding *encoding,
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+		enum dc_color_depth *depth);
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+
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+	void (*enc_read_state)(struct stream_encoder *enc, struct enc_state *s);
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+
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+	void (*dp_set_dsc_config)(
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+			struct stream_encoder *enc,
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+			enum optc_dsc_mode dsc_mode,
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+			uint32_t dsc_bytes_per_pixel,
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+			uint32_t dsc_slice_width);
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+
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+	void (*dp_set_dsc_pps_info_packet)(struct stream_encoder *enc,
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+				bool enable,
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+				uint8_t *dsc_packed_pps);
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+
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+	void (*set_dynamic_metadata)(struct stream_encoder *enc,
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+			bool enable,
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+			uint32_t hubp_requestor_id,
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+			enum dynamic_metadata_mode dmdata_mode);
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+
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+	void (*dp_set_odm_combine)(
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+		struct stream_encoder *enc,
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+		bool odm_combine);
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 };
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 #endif /* STREAM_ENCODER_H_ */