disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/gpu/drm/amd/display/dc/dc_link.h
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@@ -26,10 +26,17 @@
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 #ifndef DC_LINK_H_
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 #define DC_LINK_H_
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+#include "dc.h"
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 #include "dc_types.h"
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 #include "grph_object_defs.h"
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32
 
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+enum dc_link_fec_state {
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+	dc_link_fec_not_ready,
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+	dc_link_fec_ready,
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+	dc_link_fec_enabled
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+};
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 struct dc_link_status {
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+	bool link_active;
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 	struct dpcd_caps *dpcd_caps;
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 };
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@@ -59,6 +66,22 @@
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 struct link_trace {
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 	struct time_stamp time_stamp;
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 };
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+
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+/* PSR feature flags */
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+struct psr_settings {
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+	bool psr_feature_enabled;		// PSR is supported by sink
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+	bool psr_allow_active;			// PSR is currently active
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+	enum dc_psr_version psr_version;		// Internal PSR version, determined based on DPCD
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+
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+	/* These parameters are calculated in Driver,
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+	 * based on display timing and Sink capabilities.
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+	 * If VBLANK region is too small and Sink takes a long time
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+	 * to set up RFB, it may take an extra frame to enter PSR state.
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+	 */
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+	bool psr_frame_capture_indication_req;
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+	unsigned int psr_sdp_transmit_line_num_deadline;
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+};
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+
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 /*
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  * A link contains one or more sinks and their connected status.
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  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
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@@ -74,6 +97,10 @@
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 	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
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 	bool is_hpd_filter_disabled;
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 	bool dp_ss_off;
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+	bool link_state_valid;
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+	bool aux_access_disabled;
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+	bool sync_lt_in_progress;
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+	bool lttpr_non_transparent_mode;
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 	/* caps is the same as reported_link_cap. link_traing use
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 	 * reported_link_cap. Will clean up.  TODO
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@@ -83,6 +110,8 @@
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 	struct dc_link_settings cur_link_settings;
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 	struct dc_lane_settings cur_lane_setting;
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 	struct dc_link_settings preferred_link_setting;
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+	struct dc_link_training_overrides preferred_training_settings;
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+	struct dp_audio_test_data audio_test_data;
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 	uint8_t ddc_hw_inst;
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@@ -105,31 +134,44 @@
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 	struct dc_context *ctx;
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+	struct panel_cntl *panel_cntl;
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 	struct link_encoder *link_enc;
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 	struct graphics_object_id link_id;
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 	union ddi_channel_mapping ddi_channel_mapping;
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 	struct connector_device_tag_info device_tag;
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 	struct dpcd_caps dpcd_caps;
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+	uint32_t dongle_max_pix_clk;
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 	unsigned short chip_caps;
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 	unsigned int dpcd_sink_count;
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+#if defined(CONFIG_DRM_AMD_DC_HDCP)
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+	struct hdcp_caps hdcp_caps;
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+#endif
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 	enum edp_revision edp_revision;
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-	bool psr_enabled;
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+	union dpcd_sink_ext_caps dpcd_sink_ext_caps;
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+
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+	struct psr_settings psr_settings;
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 	/* MST record stream using this link */
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 	struct link_flags {
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 		bool dp_keep_receiver_powered;
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+		bool dp_skip_DID2;
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+		bool dp_skip_reset_segment;
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 	} wa_flags;
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 	struct link_mst_stream_allocation_table mst_stream_alloc_table;
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 	struct dc_link_status link_status;
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 	struct link_trace link_trace;
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+	struct gpio *hpd_gpio;
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+	enum dc_link_fec_state fec_state;
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 };
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 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
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-/*
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- * Return an enumerated dc_link.  dc_link order is constant and determined at
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+/**
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+ * dc_get_link_at_index() - Return an enumerated dc_link.
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+ *
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+ * dc_link order is constant and determined at
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  * boot time.  They cannot be created or destroyed.
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  * Use dc_get_caps() to get number of links.
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  */
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@@ -138,15 +180,46 @@
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 	return dc->links[link_index];
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 }
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-/* Set backlight level of an embedded panel (eDP, LVDS). */
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-bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
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-		uint32_t frame_ramp, const struct dc_stream_state *stream);
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+static inline struct dc_link *get_edp_link(const struct dc *dc)
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+{
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+	int i;
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+
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+	// report any eDP links, even unconnected DDI's
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+	for (i = 0; i < dc->link_count; i++) {
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+		if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP)
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+			return dc->links[i];
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+	}
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+	return NULL;
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+}
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+
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+/* Set backlight level of an embedded panel (eDP, LVDS).
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+ * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
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+ * and 16 bit fractional, where 1.0 is max backlight value.
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+ */
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+bool dc_link_set_backlight_level(const struct dc_link *dc_link,
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+		uint32_t backlight_pwm_u16_16,
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+		uint32_t frame_ramp);
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+
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+/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
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+bool dc_link_set_backlight_level_nits(struct dc_link *link,
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+		bool isHDR,
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+		uint32_t backlight_millinits,
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+		uint32_t transition_time_in_ms);
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+
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+bool dc_link_get_backlight_level_nits(struct dc_link *link,
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+		uint32_t *backlight_millinits,
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+		uint32_t *backlight_millinits_peak);
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+
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+bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
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+
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+bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
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+bool dc_link_set_default_brightness_aux(struct dc_link *link);
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 int dc_link_get_backlight_level(const struct dc_link *dc_link);
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-bool dc_link_set_abm_disable(const struct dc_link *dc_link);
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+int dc_link_get_target_backlight_pwm(const struct dc_link *link);
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-bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable, bool wait);
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+bool dc_link_set_psr_allow_active(struct dc_link *dc_link, bool enable, bool wait);
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 bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
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@@ -164,9 +237,14 @@
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 	DETECT_REASON_BOOT,
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 	DETECT_REASON_HPD,
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 	DETECT_REASON_HPDRX,
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+	DETECT_REASON_FALLBACK,
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+	DETECT_REASON_RETRAIN
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 };
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 bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
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+bool dc_link_get_hpd_state(struct dc_link *dc_link);
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+enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
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+enum dc_status dc_link_reallocate_mst_payload(struct dc_link *link);
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 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
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  * Return:
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@@ -195,10 +273,23 @@
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 	struct dc_link *link,
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 	struct link_training_settings *lt_settings);
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+bool dc_link_dp_perform_link_training_skip_aux(
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+	struct dc_link *link,
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+	const struct dc_link_settings *link_setting);
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+
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 enum link_training_result dc_link_dp_perform_link_training(
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 	struct dc_link *link,
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 	const struct dc_link_settings *link_setting,
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 	bool skip_video_pattern);
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+
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+bool dc_link_dp_sync_lt_begin(struct dc_link *link);
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+
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+enum link_training_result dc_link_dp_sync_lt_attempt(
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+	struct dc_link *link,
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+	struct dc_link_settings *link_setting,
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+	struct dc_link_training_overrides *lt_settings);
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+
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+bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
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 void dc_link_dp_enable_hpd(const struct dc_link *link);
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@@ -207,6 +298,7 @@
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 bool dc_link_dp_set_test_pattern(
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 	struct dc_link *link,
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 	enum dp_test_pattern test_pattern,
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+	enum dp_test_pattern_color_space test_pattern_color_space,
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 	const struct link_training_settings *p_link_settings,
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 	const unsigned char *p_custom_pattern,
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 	unsigned int cust_pattern_size);
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@@ -220,6 +312,10 @@
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  * DPCD access interfaces
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  */
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+#ifdef CONFIG_DRM_AMD_DC_HDCP
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+bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
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+bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
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+#endif
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 void dc_link_set_drive_settings(struct dc *dc,
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 				struct link_training_settings *lt_settings,
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 				const struct dc_link *link);
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@@ -229,17 +325,41 @@
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 void dc_link_set_preferred_link_settings(struct dc *dc,
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 					 struct dc_link_settings *link_setting,
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 					 struct dc_link *link);
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+void dc_link_set_preferred_training_settings(struct dc *dc,
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+					struct dc_link_settings *link_setting,
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+					struct dc_link_training_overrides *lt_overrides,
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+					struct dc_link *link,
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+					bool skip_immediate_retrain);
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 void dc_link_enable_hpd(const struct dc_link *link);
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 void dc_link_disable_hpd(const struct dc_link *link);
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 void dc_link_set_test_pattern(struct dc_link *link,
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 			enum dp_test_pattern test_pattern,
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+			enum dp_test_pattern_color_space test_pattern_color_space,
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 			const struct link_training_settings *p_link_settings,
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 			const unsigned char *p_custom_pattern,
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 			unsigned int cust_pattern_size);
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+uint32_t dc_link_bandwidth_kbps(
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+	const struct dc_link *link,
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+	const struct dc_link_settings *link_setting);
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+
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+const struct dc_link_settings *dc_link_get_link_cap(
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+		const struct dc_link *link);
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+
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+void dc_link_overwrite_extended_receiver_cap(
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+		struct dc_link *link);
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 bool dc_submit_i2c(
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 		struct dc *dc,
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 		uint32_t link_index,
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 		struct i2c_command *cmd);
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+bool dc_submit_i2c_oem(
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+		struct dc *dc,
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+		struct i2c_command *cmd);
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+
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+uint32_t dc_bandwidth_in_kbps_from_timing(
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+	const struct dc_crtc_timing *timing);
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+
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+bool dc_link_is_fec_supported(const struct dc_link *link);
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+
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 #endif /* DC_LINK_H_ */