disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/fpga/xilinx-pr-decoupler.c
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@@ -1,18 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (c) 2017, National Instruments Corp.
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  * Copyright (c) 2017, Xilix Inc
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  *
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  * FPGA Bridge Driver for the Xilinx LogiCORE Partial Reconfiguration
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  * Decoupler IP Core.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; version 2 of the License.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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  */
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 #include <linux/clk.h>
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@@ -109,7 +101,8 @@
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 	priv->clk = devm_clk_get(&pdev->dev, "aclk");
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 	if (IS_ERR(priv->clk)) {
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-		dev_err(&pdev->dev, "input clock not found\n");
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+		if (PTR_ERR(priv->clk) != -EPROBE_DEFER)
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+			dev_err(&pdev->dev, "input clock not found\n");
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 		return PTR_ERR(priv->clk);
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 	}
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@@ -121,8 +114,8 @@
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 	clk_disable(priv->clk);
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-	br = fpga_bridge_create(&pdev->dev, "Xilinx PR Decoupler",
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-				&xlnx_pr_decoupler_br_ops, priv);
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+	br = devm_fpga_bridge_create(&pdev->dev, "Xilinx PR Decoupler",
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+				     &xlnx_pr_decoupler_br_ops, priv);
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 	if (!br) {
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 		err = -ENOMEM;
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 		goto err_clk;