.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Performance events - AMD Processor Power Reporting Mechanism |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2016 Advanced Micro Devices, Inc. |
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5 | 6 | * |
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6 | 7 | * Author: Huang Rui <ray.huang@amd.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License version 2 as |
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10 | | - * published by the Free Software Foundation. |
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11 | 8 | */ |
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12 | 9 | |
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13 | 10 | #include <linux/module.h> |
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.. | .. |
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15 | 12 | #include <linux/perf_event.h> |
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16 | 13 | #include <asm/cpu_device_id.h> |
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17 | 14 | #include "../perf_event.h" |
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18 | | - |
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19 | | -#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a |
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20 | | -#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b |
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21 | | -#define MSR_F15H_PTSC 0xc0010280 |
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22 | 15 | |
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23 | 16 | /* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */ |
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24 | 17 | #define AMD_POWER_EVENT_MASK 0xFFULL |
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.. | .. |
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136 | 129 | return -ENOENT; |
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137 | 130 | |
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138 | 131 | /* Unsupported modes and filters. */ |
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139 | | - if (event->attr.exclude_user || |
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140 | | - event->attr.exclude_kernel || |
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141 | | - event->attr.exclude_hv || |
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142 | | - event->attr.exclude_idle || |
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143 | | - event->attr.exclude_host || |
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144 | | - event->attr.exclude_guest || |
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145 | | - /* no sampling */ |
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146 | | - event->attr.sample_period) |
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| 132 | + if (event->attr.sample_period) |
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147 | 133 | return -EINVAL; |
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148 | 134 | |
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149 | 135 | if (cfg != AMD_POWER_EVENTSEL_PKG) |
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.. | .. |
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226 | 212 | .start = pmu_event_start, |
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227 | 213 | .stop = pmu_event_stop, |
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228 | 214 | .read = pmu_event_read, |
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| 215 | + .capabilities = PERF_PMU_CAP_NO_EXCLUDE, |
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| 216 | + .module = THIS_MODULE, |
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229 | 217 | }; |
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230 | 218 | |
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231 | 219 | static int power_cpu_exit(unsigned int cpu) |
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.. | .. |
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268 | 256 | } |
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269 | 257 | |
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270 | 258 | static const struct x86_cpu_id cpu_match[] = { |
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271 | | - { .vendor = X86_VENDOR_AMD, .family = 0x15 }, |
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| 259 | + X86_MATCH_VENDOR_FAM(AMD, 0x15, NULL), |
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272 | 260 | {}, |
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273 | 261 | }; |
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274 | 262 | |
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