.. | .. |
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37 | 37 | #include <asm/signal.h> |
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38 | 38 | #include <asm/sim.h> |
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39 | 39 | #include <asm/shmparam.h> |
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| 40 | +#include <asm/sync.h> |
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40 | 41 | #include <asm/sysmips.h> |
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41 | 42 | #include <asm/switch_to.h> |
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42 | 43 | |
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.. | .. |
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80 | 81 | |
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81 | 82 | save_static_function(sys_fork); |
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82 | 83 | save_static_function(sys_clone); |
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| 84 | +save_static_function(sys_clone3); |
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83 | 85 | |
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84 | 86 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) |
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85 | 87 | { |
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.. | .. |
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101 | 103 | if (unlikely(addr & 3)) |
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102 | 104 | return -EINVAL; |
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103 | 105 | |
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104 | | - if (unlikely(!access_ok(VERIFY_WRITE, (const void __user *)addr, 4))) |
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| 106 | + if (unlikely(!access_ok((const void __user *)addr, 4))) |
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105 | 107 | return -EINVAL; |
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106 | 108 | |
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107 | | - if (cpu_has_llsc && R10000_LLSC_WAR) { |
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| 109 | + if (cpu_has_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) { |
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108 | 110 | __asm__ __volatile__ ( |
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| 111 | + " .set push \n" |
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109 | 112 | " .set arch=r4000 \n" |
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110 | 113 | " li %[err], 0 \n" |
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111 | 114 | "1: ll %[old], (%[addr]) \n" |
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122 | 125 | " "STR(PTR)" 1b, 4b \n" |
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123 | 126 | " "STR(PTR)" 2b, 4b \n" |
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124 | 127 | " .previous \n" |
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125 | | - " .set mips0 \n" |
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| 128 | + " .set pop \n" |
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126 | 129 | : [old] "=&r" (old), |
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127 | 130 | [err] "=&r" (err), |
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128 | 131 | [tmp] "=&r" (tmp) |
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.. | .. |
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132 | 135 | : "memory"); |
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133 | 136 | } else if (cpu_has_llsc) { |
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134 | 137 | __asm__ __volatile__ ( |
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| 138 | + " .set push \n" |
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135 | 139 | " .set "MIPS_ISA_ARCH_LEVEL" \n" |
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136 | 140 | " li %[err], 0 \n" |
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137 | 141 | "1: \n" |
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| 142 | + " " __SYNC(full, loongson3_war) " \n" |
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138 | 143 | user_ll("%[old]", "(%[addr])") |
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139 | 144 | " move %[tmp], %[new] \n" |
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140 | 145 | "2: \n" |
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.. | .. |
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150 | 155 | " "STR(PTR)" 1b, 5b \n" |
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151 | 156 | " "STR(PTR)" 2b, 5b \n" |
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152 | 157 | " .previous \n" |
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153 | | - " .set mips0 \n" |
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| 158 | + " .set pop \n" |
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154 | 159 | : [old] "=&r" (old), |
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155 | 160 | [err] "=&r" (err), |
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156 | 161 | [tmp] "=&r" (tmp) |
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