forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi
....@@ -1,10 +1,9 @@
11 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
22 /*
3
- * Copyright (c) 2020~2021 Rockchip Electronics Co., Ltd.
3
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
44 */
55
66 &pinctrl {
7
-
87 /omit-if-no-ref/
98 pcfg_pull_up: pcfg-pull-up {
109 bias-pull-up;
....@@ -334,6 +333,41 @@
334333 };
335334
336335 /omit-if-no-ref/
336
+ pcfg_pull_none_drv_level_1_smt: pcfg-pull-none-drv-level-1-smt {
337
+ bias-disable;
338
+ drive-strength = <1>;
339
+ input-schmitt-enable;
340
+ };
341
+
342
+ /omit-if-no-ref/
343
+ pcfg_pull_none_drv_level_2_smt: pcfg-pull-none-drv-level-2-smt {
344
+ bias-disable;
345
+ drive-strength = <2>;
346
+ input-schmitt-enable;
347
+ };
348
+
349
+ /omit-if-no-ref/
350
+ pcfg_pull_none_drv_level_3_smt: pcfg-pull-none-drv-level-3-smt {
351
+ bias-disable;
352
+ drive-strength = <3>;
353
+ input-schmitt-enable;
354
+ };
355
+
356
+ /omit-if-no-ref/
357
+ pcfg_pull_none_drv_level_4_smt: pcfg-pull-none-drv-level-4-smt {
358
+ bias-disable;
359
+ drive-strength = <4>;
360
+ input-schmitt-enable;
361
+ };
362
+
363
+ /omit-if-no-ref/
364
+ pcfg_pull_none_drv_level_5_smt: pcfg-pull-none-drv-level-5-smt {
365
+ bias-disable;
366
+ drive-strength = <5>;
367
+ input-schmitt-enable;
368
+ };
369
+
370
+ /omit-if-no-ref/
337371 pcfg_output_high: pcfg-output-high {
338372 output-high;
339373 };
....@@ -379,4 +413,3 @@
379413 bias-disable;
380414 };
381415 };
382
-