forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-04 1543e317f1da31b75942316931e8f491a8920811
kernel/arch/arm64/boot/dts/realtek/rtd1295.dtsi
....@@ -1,9 +1,8 @@
1
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
12 /*
23 * Realtek RTD1295 SoC
34 *
4
- * Copyright (c) 2016-2017 Andreas Färber
5
- *
6
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5
+ * Copyright (c) 2016-2019 Andreas Färber
76 */
87
98 #include "rtd129x.dtsi"
....@@ -17,28 +16,28 @@
1716
1817 cpu0: cpu@0 {
1918 device_type = "cpu";
20
- compatible = "arm,cortex-a53", "arm,armv8";
19
+ compatible = "arm,cortex-a53";
2120 reg = <0x0 0x0>;
2221 next-level-cache = <&l2>;
2322 };
2423
2524 cpu1: cpu@1 {
2625 device_type = "cpu";
27
- compatible = "arm,cortex-a53", "arm,armv8";
26
+ compatible = "arm,cortex-a53";
2827 reg = <0x0 0x1>;
2928 next-level-cache = <&l2>;
3029 };
3130
3231 cpu2: cpu@2 {
3332 device_type = "cpu";
34
- compatible = "arm,cortex-a53", "arm,armv8";
33
+ compatible = "arm,cortex-a53";
3534 reg = <0x0 0x2>;
3635 next-level-cache = <&l2>;
3736 };
3837
3938 cpu3: cpu@3 {
4039 device_type = "cpu";
41
- compatible = "arm,cortex-a53", "arm,armv8";
40
+ compatible = "arm,cortex-a53";
4241 reg = <0x0 0x3>;
4342 next-level-cache = <&l2>;
4443 };
....@@ -48,27 +47,16 @@
4847 };
4948 };
5049
51
- reserved-memory {
52
- #address-cells = <1>;
53
- #size-cells = <1>;
54
- ranges;
55
-
56
- tee@10100000 {
57
- reg = <0x10100000 0xf00000>;
58
- no-map;
59
- };
60
- };
61
-
6250 timer {
6351 compatible = "arm,armv8-timer";
6452 interrupts = <GIC_PPI 13
65
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
53
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
6654 <GIC_PPI 14
67
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
55
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
6856 <GIC_PPI 11
69
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
57
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
7058 <GIC_PPI 10
71
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>;
59
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
7260 };
7361 };
7462