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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2013-2014 Linaro Ltd. |
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3 | 4 | * Copyright (c) 2013-2014 Hisilicon Limited. |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify it |
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6 | | - * under the terms and conditions of the GNU General Public License, |
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7 | | - * version 2, as published by the Free Software Foundation. |
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8 | 5 | */ |
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9 | 6 | #include <linux/init.h> |
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10 | 7 | #include <linux/smp.h> |
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.. | .. |
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61 | 58 | |
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62 | 59 | static void __iomem *sysctrl, *fabric; |
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63 | 60 | static int hip04_cpu_table[HIP04_MAX_CLUSTERS][HIP04_MAX_CPUS_PER_CLUSTER]; |
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64 | | -static DEFINE_RAW_SPINLOCK(boot_lock); |
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| 61 | +static DEFINE_SPINLOCK(boot_lock); |
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65 | 62 | static u32 fabric_phys_addr; |
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66 | 63 | /* |
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67 | 64 | * [0]: bootwrapper physical address |
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.. | .. |
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113 | 110 | if (cluster >= HIP04_MAX_CLUSTERS || cpu >= HIP04_MAX_CPUS_PER_CLUSTER) |
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114 | 111 | return -EINVAL; |
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115 | 112 | |
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116 | | - raw_spin_lock_irq(&boot_lock); |
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| 113 | + spin_lock_irq(&boot_lock); |
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117 | 114 | |
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118 | 115 | if (hip04_cpu_table[cluster][cpu]) |
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119 | 116 | goto out; |
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.. | .. |
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147 | 144 | |
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148 | 145 | out: |
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149 | 146 | hip04_cpu_table[cluster][cpu]++; |
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150 | | - raw_spin_unlock_irq(&boot_lock); |
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| 147 | + spin_unlock_irq(&boot_lock); |
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151 | 148 | |
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152 | 149 | return 0; |
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153 | 150 | } |
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.. | .. |
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162 | 159 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); |
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163 | 160 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); |
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164 | 161 | |
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165 | | - raw_spin_lock(&boot_lock); |
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| 162 | + spin_lock(&boot_lock); |
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166 | 163 | hip04_cpu_table[cluster][cpu]--; |
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167 | 164 | if (hip04_cpu_table[cluster][cpu] == 1) { |
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168 | 165 | /* A power_up request went ahead of us. */ |
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169 | | - raw_spin_unlock(&boot_lock); |
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| 166 | + spin_unlock(&boot_lock); |
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170 | 167 | return; |
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171 | 168 | } else if (hip04_cpu_table[cluster][cpu] > 1) { |
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172 | 169 | pr_err("Cluster %d CPU%d boots multiple times\n", cluster, cpu); |
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.. | .. |
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174 | 171 | } |
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175 | 172 | |
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176 | 173 | last_man = hip04_cluster_is_down(cluster); |
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177 | | - raw_spin_unlock(&boot_lock); |
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| 174 | + spin_unlock(&boot_lock); |
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178 | 175 | if (last_man) { |
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179 | 176 | /* Since it's Cortex A15, disable L2 prefetching. */ |
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180 | 177 | asm volatile( |
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.. | .. |
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203 | 200 | cpu >= HIP04_MAX_CPUS_PER_CLUSTER); |
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204 | 201 | |
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205 | 202 | count = TIMEOUT_MSEC / POLL_MSEC; |
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206 | | - raw_spin_lock_irq(&boot_lock); |
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| 203 | + spin_lock_irq(&boot_lock); |
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207 | 204 | for (tries = 0; tries < count; tries++) { |
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208 | 205 | if (hip04_cpu_table[cluster][cpu]) |
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209 | 206 | goto err; |
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.. | .. |
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211 | 208 | data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster)); |
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212 | 209 | if (data & CORE_WFI_STATUS(cpu)) |
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213 | 210 | break; |
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214 | | - raw_spin_unlock_irq(&boot_lock); |
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| 211 | + spin_unlock_irq(&boot_lock); |
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215 | 212 | /* Wait for clean L2 when the whole cluster is down. */ |
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216 | 213 | msleep(POLL_MSEC); |
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217 | | - raw_spin_lock_irq(&boot_lock); |
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| 214 | + spin_lock_irq(&boot_lock); |
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218 | 215 | } |
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219 | 216 | if (tries >= count) |
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220 | 217 | goto err; |
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.. | .. |
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231 | 228 | goto err; |
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232 | 229 | if (hip04_cluster_is_down(cluster)) |
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233 | 230 | hip04_set_snoop_filter(cluster, 0); |
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234 | | - raw_spin_unlock_irq(&boot_lock); |
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| 231 | + spin_unlock_irq(&boot_lock); |
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235 | 232 | return 1; |
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236 | 233 | err: |
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237 | | - raw_spin_unlock_irq(&boot_lock); |
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| 234 | + spin_unlock_irq(&boot_lock); |
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238 | 235 | return 0; |
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239 | 236 | } |
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240 | 237 | #endif |
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