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2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/Documentation/devicetree/bindings/virtio/mmio.txt
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@@ -1,6 +1,6 @@
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 * virtio memory mapped device
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-See http://ozlabs.org/~rusty/virtio-spec/ for more details.
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+See https://ozlabs.org/~rusty/virtio-spec/ for more details.
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 Required properties:
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@@ -8,10 +8,40 @@
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 - reg:		control registers base address and size including configuration space
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 - interrupts:	interrupt generated by the device
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+Required properties for virtio-iommu:
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+
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+- #iommu-cells:	When the node corresponds to a virtio-iommu device, it is
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+		linked to DMA masters using the "iommus" or "iommu-map"
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+		properties [1][2]. #iommu-cells specifies the size of the
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+		"iommus" property. For virtio-iommu #iommu-cells must be
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+		1, each cell describing a single endpoint ID.
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+
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+Optional properties:
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+
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+- iommus:	If the device accesses memory through an IOMMU, it should
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+		have an "iommus" property [1]. Since virtio-iommu itself
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+		does not access memory through an IOMMU, the "virtio,mmio"
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+		node cannot have both an "#iommu-cells" and an "iommus"
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+		property.
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+
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 Example:
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 	virtio_block@3000 {
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 		compatible = "virtio,mmio";
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 		reg = <0x3000 0x100>;
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 		interrupts = <41>;
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+
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+		/* Device has endpoint ID 23 */
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+		iommus = <&viommu 23>
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 	}
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+
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+	viommu: iommu@3100 {
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+		compatible = "virtio,mmio";
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+		reg = <0x3100 0x100>;
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+		interrupts = <42>;
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+
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+		#iommu-cells = <1>
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+	}
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+
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+[1] Documentation/devicetree/bindings/iommu/iommu.txt
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+[2] Documentation/devicetree/bindings/pci/pci-iommu.txt