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| 1 | +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
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| 2 | +/* |
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| 3 | + * Copyright(c) 2016 - 2018 Intel Corporation. |
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| 4 | + */ |
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| 5 | + |
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1 | 6 | #ifndef DEF_RDMAVT_INCCQ_H |
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2 | 7 | #define DEF_RDMAVT_INCCQ_H |
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3 | 8 | |
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4 | | -/* |
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5 | | - * |
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6 | | - * This file is provided under a dual BSD/GPLv2 license. When using or |
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7 | | - * redistributing this file, you may do so under either license. |
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8 | | - * |
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9 | | - * GPL LICENSE SUMMARY |
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10 | | - * |
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11 | | - * Copyright(c) 2016 - 2018 Intel Corporation. |
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12 | | - * |
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13 | | - * This program is free software; you can redistribute it and/or modify |
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14 | | - * it under the terms of version 2 of the GNU General Public License as |
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15 | | - * published by the Free Software Foundation. |
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16 | | - * |
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17 | | - * This program is distributed in the hope that it will be useful, but |
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18 | | - * WITHOUT ANY WARRANTY; without even the implied warranty of |
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19 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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20 | | - * General Public License for more details. |
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21 | | - * |
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22 | | - * BSD LICENSE |
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23 | | - * |
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24 | | - * Copyright(c) 2015 Intel Corporation. |
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25 | | - * |
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26 | | - * Redistribution and use in source and binary forms, with or without |
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27 | | - * modification, are permitted provided that the following conditions |
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28 | | - * are met: |
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29 | | - * |
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30 | | - * - Redistributions of source code must retain the above copyright |
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31 | | - * notice, this list of conditions and the following disclaimer. |
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32 | | - * - Redistributions in binary form must reproduce the above copyright |
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33 | | - * notice, this list of conditions and the following disclaimer in |
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34 | | - * the documentation and/or other materials provided with the |
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35 | | - * distribution. |
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36 | | - * - Neither the name of Intel Corporation nor the names of its |
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37 | | - * contributors may be used to endorse or promote products derived |
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38 | | - * from this software without specific prior written permission. |
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39 | | - * |
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40 | | - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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41 | | - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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42 | | - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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43 | | - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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44 | | - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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45 | | - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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46 | | - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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47 | | - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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48 | | - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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49 | | - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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50 | | - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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51 | | - * |
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52 | | - */ |
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53 | | - |
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54 | 9 | #include <linux/kthread.h> |
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55 | 10 | #include <rdma/ib_user_verbs.h> |
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| 11 | +#include <rdma/ib_verbs.h> |
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56 | 12 | |
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57 | 13 | /* |
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58 | 14 | * Define an ib_cq_notify value that is not valid so we know when CQ |
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.. | .. |
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61 | 17 | #define RVT_CQ_NONE (IB_CQ_NEXT_COMP + 1) |
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62 | 18 | |
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63 | 19 | /* |
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| 20 | + * Define read macro that apply smp_load_acquire memory barrier |
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| 21 | + * when reading indice of circular buffer that mmaped to user space. |
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| 22 | + */ |
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| 23 | +#define RDMA_READ_UAPI_ATOMIC(member) smp_load_acquire(&(member).val) |
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| 24 | + |
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| 25 | +/* |
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| 26 | + * Define write macro that uses smp_store_release memory barrier |
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| 27 | + * when writing indice of circular buffer that mmaped to user space. |
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| 28 | + */ |
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| 29 | +#define RDMA_WRITE_UAPI_ATOMIC(member, x) smp_store_release(&(member).val, x) |
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| 30 | +#include <rdma/rvt-abi.h> |
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| 31 | + |
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| 32 | +/* |
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64 | 33 | * This structure is used to contain the head pointer, tail pointer, |
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65 | 34 | * and completion queue entries as a single memory allocation so |
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66 | 35 | * it can be mmap'ed into user space. |
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67 | 36 | */ |
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68 | | -struct rvt_cq_wc { |
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| 37 | +struct rvt_k_cq_wc { |
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69 | 38 | u32 head; /* index of next entry to fill */ |
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70 | 39 | u32 tail; /* index of next ib_poll_cq() entry */ |
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71 | | - union { |
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72 | | - /* these are actually size ibcq.cqe + 1 */ |
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73 | | - struct ib_uverbs_wc uqueue[0]; |
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74 | | - struct ib_wc kqueue[0]; |
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75 | | - }; |
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| 40 | + struct ib_wc kqueue[]; |
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76 | 41 | }; |
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77 | 42 | |
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78 | 43 | /* |
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.. | .. |
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84 | 49 | spinlock_t lock; /* protect changes in this struct */ |
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85 | 50 | u8 notify; |
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86 | 51 | u8 triggered; |
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| 52 | + u8 cq_full; |
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87 | 53 | int comp_vector_cpu; |
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88 | 54 | struct rvt_dev_info *rdi; |
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89 | 55 | struct rvt_cq_wc *queue; |
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90 | 56 | struct rvt_mmap_info *ip; |
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| 57 | + struct rvt_k_cq_wc *kqueue; |
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91 | 58 | }; |
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92 | 59 | |
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93 | 60 | static inline struct rvt_cq *ibcq_to_rvtcq(struct ib_cq *ibcq) |
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.. | .. |
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95 | 62 | return container_of(ibcq, struct rvt_cq, ibcq); |
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96 | 63 | } |
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97 | 64 | |
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98 | | -void rvt_cq_enter(struct rvt_cq *cq, struct ib_wc *entry, bool solicited); |
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| 65 | +bool rvt_cq_enter(struct rvt_cq *cq, struct ib_wc *entry, bool solicited); |
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99 | 66 | |
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100 | 67 | #endif /* DEF_RDMAVT_INCCQH */ |
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