| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Support code for Analog Devices Sigma-Delta ADCs |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright 2012 Analog Devices Inc. |
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| 5 | 6 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
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| 6 | | - * |
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| 7 | | - * Licensed under the GPL-2. |
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| 8 | 7 | */ |
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| 9 | 8 | #ifndef __AD_SIGMA_DELTA_H__ |
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| 10 | 9 | #define __AD_SIGMA_DELTA_H__ |
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| .. | .. |
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| 39 | 38 | * if there is just one read-only sample data shift register. |
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| 40 | 39 | * @addr_shift: Shift of the register address in the communications register. |
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| 41 | 40 | * @read_mask: Mask for the communications register having the read bit set. |
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| 41 | + * @data_reg: Address of the data register, if 0 the default address of 0x3 will |
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| 42 | + * be used. |
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| 43 | + * @irq_flags: flags for the interrupt used by the triggered buffer |
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| 42 | 44 | */ |
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| 43 | 45 | struct ad_sigma_delta_info { |
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| 44 | 46 | int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); |
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| .. | .. |
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| 47 | 49 | bool has_registers; |
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| 48 | 50 | unsigned int addr_shift; |
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| 49 | 51 | unsigned int read_mask; |
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| 52 | + unsigned int data_reg; |
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| 53 | + unsigned long irq_flags; |
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| 50 | 54 | }; |
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| 51 | 55 | |
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| 52 | 56 | /** |
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| .. | .. |
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| 75 | 79 | /* |
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| 76 | 80 | * DMA (thus cache coherency maintenance) requires the |
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| 77 | 81 | * transfer buffers to live in their own cache lines. |
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| 82 | + * 'tx_buf' is up to 32 bits. |
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| 83 | + * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp, |
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| 84 | + * rounded to 16 bytes to take into account padding. |
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| 78 | 85 | */ |
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| 79 | | - uint8_t data[4] ____cacheline_aligned; |
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| 86 | + uint8_t tx_buf[4] ____cacheline_aligned; |
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| 87 | + uint8_t rx_buf[16] __aligned(8); |
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| 80 | 88 | }; |
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| 81 | 89 | |
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| 82 | 90 | static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd, |
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| .. | .. |
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| 117 | 125 | |
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| 118 | 126 | int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, |
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| 119 | 127 | const struct iio_chan_spec *chan, int *val); |
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| 128 | +int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, |
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| 129 | + unsigned int mode, unsigned int channel); |
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| 120 | 130 | int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta, |
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| 121 | 131 | const struct ad_sd_calib_data *cd, unsigned int n); |
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| 122 | 132 | int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, |
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| .. | .. |
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| 126 | 136 | void ad_sd_cleanup_buffer_and_trigger(struct iio_dev *indio_dev); |
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| 127 | 137 | |
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| 128 | 138 | int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig); |
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| 129 | | - |
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| 130 | | -#define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ |
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| 131 | | - _storagebits, _shift, _extend_name, _type, _mask_all) \ |
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| 132 | | - { \ |
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| 133 | | - .type = (_type), \ |
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| 134 | | - .differential = (_channel2 == -1 ? 0 : 1), \ |
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| 135 | | - .indexed = 1, \ |
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| 136 | | - .channel = (_channel1), \ |
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| 137 | | - .channel2 = (_channel2), \ |
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| 138 | | - .address = (_address), \ |
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| 139 | | - .extend_name = (_extend_name), \ |
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| 140 | | - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
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| 141 | | - BIT(IIO_CHAN_INFO_OFFSET), \ |
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| 142 | | - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
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| 143 | | - .info_mask_shared_by_all = _mask_all, \ |
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| 144 | | - .scan_index = (_si), \ |
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| 145 | | - .scan_type = { \ |
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| 146 | | - .sign = 'u', \ |
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| 147 | | - .realbits = (_bits), \ |
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| 148 | | - .storagebits = (_storagebits), \ |
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| 149 | | - .shift = (_shift), \ |
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| 150 | | - .endianness = IIO_BE, \ |
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| 151 | | - }, \ |
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| 152 | | - } |
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| 153 | | - |
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| 154 | | -#define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ |
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| 155 | | - _storagebits, _shift) \ |
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| 156 | | - __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ |
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| 157 | | - _storagebits, _shift, NULL, IIO_VOLTAGE, \ |
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| 158 | | - BIT(IIO_CHAN_INFO_SAMP_FREQ)) |
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| 159 | | - |
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| 160 | | -#define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ |
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| 161 | | - _storagebits, _shift) \ |
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| 162 | | - __AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \ |
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| 163 | | - _storagebits, _shift, "shorted", IIO_VOLTAGE, \ |
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| 164 | | - BIT(IIO_CHAN_INFO_SAMP_FREQ)) |
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| 165 | | - |
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| 166 | | -#define AD_SD_CHANNEL(_si, _channel, _address, _bits, \ |
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| 167 | | - _storagebits, _shift) \ |
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| 168 | | - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ |
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| 169 | | - _storagebits, _shift, NULL, IIO_VOLTAGE, \ |
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| 170 | | - BIT(IIO_CHAN_INFO_SAMP_FREQ)) |
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| 171 | | - |
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| 172 | | -#define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \ |
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| 173 | | - _storagebits, _shift) \ |
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| 174 | | - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ |
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| 175 | | - _storagebits, _shift, NULL, IIO_VOLTAGE, 0) |
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| 176 | | - |
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| 177 | | -#define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \ |
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| 178 | | - __AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \ |
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| 179 | | - _storagebits, _shift, NULL, IIO_TEMP, \ |
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| 180 | | - BIT(IIO_CHAN_INFO_SAMP_FREQ)) |
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| 181 | | - |
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| 182 | | -#define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \ |
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| 183 | | - _shift) \ |
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| 184 | | - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ |
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| 185 | | - _storagebits, _shift, "supply", IIO_VOLTAGE, \ |
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| 186 | | - BIT(IIO_CHAN_INFO_SAMP_FREQ)) |
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| 187 | 139 | |
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| 188 | 140 | #endif |
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