export RK_PA3

hc

2024-02-19 151fecfb72a0d602dfe79790602ef64b4e241574

 kernel/arch/ia64/include/asm/cacheflush.h
..
..
@@ -12,44 +12,22 @@
12
12
 
13
13
 #include <asm/page.h>
14
14
 
15
-/*
16
- * Cache flushing routines.  This is the kind of stuff that can be very expensive, so try
17
- * to avoid them whenever possible.
18
- */
19
-
20
-#define flush_cache_all()			do { } while (0)
21
-#define flush_cache_mm(mm)			do { } while (0)
22
-#define flush_cache_dup_mm(mm)			do { } while (0)
23
-#define flush_cache_range(vma, start, end)	do { } while (0)
24
-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
25
-#define flush_icache_page(vma,page)		do { } while (0)
26
-#define flush_cache_vmap(start, end)		do { } while (0)
27
-#define flush_cache_vunmap(start, end)		do { } while (0)
28
-
29
15
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
30
16
 #define flush_dcache_page(page)			\
31
17
 do {						\
32
18
 	clear_bit(PG_arch_1, &(page)->flags);	\
33
19
 } while (0)
34
20
 
35
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
36
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
37
-
38
-extern void flush_icache_range (unsigned long start, unsigned long end);
21
+extern void flush_icache_range(unsigned long start, unsigned long end);
22
+#define flush_icache_range flush_icache_range
39
23
 extern void clflush_cache_range(void *addr, int size);
40
24
 
41
-
42
-#define flush_icache_user_range(vma, page, user_addr, len)					\
25
+#define flush_icache_user_page(vma, page, user_addr, len)					\
43
26
 do {												\
44
27
 	unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK);	\
45
28
 	flush_icache_range(_addr, _addr + (len));						\
46
29
 } while (0)
47
30
 
48
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
49
-do { memcpy(dst, src, len); \
50
-     flush_icache_user_range(vma, page, vaddr, len); \
51
-} while (0)
52
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
53
-	memcpy(dst, src, len)
31
+#include <asm-generic/cacheflush.h>
54
32
 
55
33
 #endif /* _ASM_IA64_CACHEFLUSH_H */