add led

hc

2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6

 kernel/include/drm/i915_pciids.h
..
..
@@ -108,8 +108,10 @@
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 	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
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 	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
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110
 
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-#define INTEL_PINEVIEW_IDS(info)			\
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-	INTEL_VGA_DEVICE(0xa001, info),			\
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+#define INTEL_PINEVIEW_G_IDS(info) \
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+	INTEL_VGA_DEVICE(0xa001, info)
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+
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+#define INTEL_PINEVIEW_M_IDS(info) \
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 	INTEL_VGA_DEVICE(0xa011, info)
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 #define INTEL_IRONLAKE_D_IDS(info) \
..
..
@@ -166,7 +168,18 @@
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 #define INTEL_IVB_Q_IDS(info) \
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 	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
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+#define INTEL_HSW_ULT_GT1_IDS(info) \
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+	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
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+	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
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+	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
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+	INTEL_VGA_DEVICE(0x0A06, info)  /* ULT GT1 mobile */
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+
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+#define INTEL_HSW_ULX_GT1_IDS(info) \
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+	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
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+
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 #define INTEL_HSW_GT1_IDS(info) \
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+	INTEL_HSW_ULT_GT1_IDS(info), \
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+	INTEL_HSW_ULX_GT1_IDS(info), \
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 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
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 	INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
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 	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
..
..
@@ -175,20 +188,26 @@
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 	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
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 	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
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 	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
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-	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
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-	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
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-	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
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 	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
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 	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
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 	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
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 	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
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 	INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */
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198
 
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+#define INTEL_HSW_ULT_GT2_IDS(info) \
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+	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
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+	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
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+	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
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+	INTEL_VGA_DEVICE(0x0A16, info)  /* ULT GT2 mobile */
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+
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+#define INTEL_HSW_ULX_GT2_IDS(info) \
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+	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
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+
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 #define INTEL_HSW_GT2_IDS(info) \
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+	INTEL_HSW_ULT_GT2_IDS(info), \
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+	INTEL_HSW_ULX_GT2_IDS(info), \
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 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
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 	INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
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 	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
..
..
@@ -197,9 +216,6 @@
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 	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
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 	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
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 	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
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-	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
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-	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
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-	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
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 	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
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 	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
..
..
@@ -207,11 +223,17 @@
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 	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
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 	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
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 	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
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 	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
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227
 
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+#define INTEL_HSW_ULT_GT3_IDS(info) \
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+	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
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+	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
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+	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
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+	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
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+	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
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+
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 #define INTEL_HSW_GT3_IDS(info) \
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+	INTEL_HSW_ULT_GT3_IDS(info), \
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 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
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 	INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
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 	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
..
..
@@ -220,16 +242,11 @@
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 	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
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 	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
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 	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
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-	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
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-	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
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-	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
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 	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
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 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
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 	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
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-	INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
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 	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
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 #define INTEL_HSW_IDS(info) \
..
..
@@ -241,39 +258,61 @@
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 	INTEL_VGA_DEVICE(0x0f30, info), \
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 	INTEL_VGA_DEVICE(0x0f31, info), \
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 	INTEL_VGA_DEVICE(0x0f32, info), \
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-	INTEL_VGA_DEVICE(0x0f33, info), \
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-	INTEL_VGA_DEVICE(0x0157, info), \
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-	INTEL_VGA_DEVICE(0x0155, info)
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+	INTEL_VGA_DEVICE(0x0f33, info)
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262
 
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-#define INTEL_BDW_GT1_IDS(info)  \
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-	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
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+#define INTEL_BDW_ULT_GT1_IDS(info) \
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 	INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
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-	INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
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-	INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
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+	INTEL_VGA_DEVICE(0x160B, info)  /* GT1 Iris */
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+
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+#define INTEL_BDW_ULX_GT1_IDS(info) \
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+	INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
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+
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+#define INTEL_BDW_GT1_IDS(info) \
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+	INTEL_BDW_ULT_GT1_IDS(info), \
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+	INTEL_BDW_ULX_GT1_IDS(info), \
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+	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
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 	INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
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 	INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */
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-#define INTEL_BDW_GT2_IDS(info)  \
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-	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */	\
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+#define INTEL_BDW_ULT_GT2_IDS(info) \
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 	INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
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-	INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
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-	INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
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+	INTEL_VGA_DEVICE(0x161B, info)  /* GT2 ULT */
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+
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+#define INTEL_BDW_ULX_GT2_IDS(info) \
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+	INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
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+
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+#define INTEL_BDW_GT2_IDS(info) \
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+	INTEL_BDW_ULT_GT2_IDS(info), \
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+	INTEL_BDW_ULX_GT2_IDS(info), \
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+	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */	\
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 	INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
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 	INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */
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-#define INTEL_BDW_GT3_IDS(info) \
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-	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
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+#define INTEL_BDW_ULT_GT3_IDS(info) \
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 	INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
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-	INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
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-	INTEL_VGA_DEVICE(0x162E, info),  /* ULX */\
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+	INTEL_VGA_DEVICE(0x162B, info)  /* Iris */ \
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+
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+#define INTEL_BDW_ULX_GT3_IDS(info) \
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+	INTEL_VGA_DEVICE(0x162E, info)  /* ULX */
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+
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+#define INTEL_BDW_GT3_IDS(info) \
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+	INTEL_BDW_ULT_GT3_IDS(info), \
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+	INTEL_BDW_ULX_GT3_IDS(info), \
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+	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
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 	INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
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 	INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */
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-#define INTEL_BDW_RSVD_IDS(info) \
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-	INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
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+#define INTEL_BDW_ULT_RSVD_IDS(info) \
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 	INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
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-	INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
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-	INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
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+	INTEL_VGA_DEVICE(0x163B, info)  /* Iris */
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+
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+#define INTEL_BDW_ULX_RSVD_IDS(info) \
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+	INTEL_VGA_DEVICE(0x163E, info) /* ULX */
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+
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+#define INTEL_BDW_RSVD_IDS(info) \
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+	INTEL_BDW_ULT_RSVD_IDS(info), \
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+	INTEL_BDW_ULX_RSVD_IDS(info), \
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+	INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
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 	INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
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 	INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */
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318
 
..
..
@@ -289,25 +328,40 @@
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 	INTEL_VGA_DEVICE(0x22b2, info), \
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 	INTEL_VGA_DEVICE(0x22b3, info)
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330
 
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+#define INTEL_SKL_ULT_GT1_IDS(info) \
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+	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
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+
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+#define INTEL_SKL_ULX_GT1_IDS(info) \
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+	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
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+
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 #define INTEL_SKL_GT1_IDS(info)	\
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-	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
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-	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
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+	INTEL_SKL_ULT_GT1_IDS(info), \
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+	INTEL_SKL_ULX_GT1_IDS(info), \
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 	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
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 	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
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 	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
298
343
 
299
-#define INTEL_SKL_GT2_IDS(info)	\
344
+#define INTEL_SKL_ULT_GT2_IDS(info) \
300
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 	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
301
-	INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
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-	INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
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+	INTEL_VGA_DEVICE(0x1921, info)  /* ULT GT2F */
347
+
348
+#define INTEL_SKL_ULX_GT2_IDS(info) \
349
+	INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
350
+
351
+#define INTEL_SKL_GT2_IDS(info)	\
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+	INTEL_SKL_ULT_GT2_IDS(info), \
353
+	INTEL_SKL_ULX_GT2_IDS(info), \
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 	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
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 	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
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 	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
306
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 	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
307
358
 
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+#define INTEL_SKL_ULT_GT3_IDS(info) \
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+	INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
361
+
308
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 #define INTEL_SKL_GT3_IDS(info) \
363
+	INTEL_SKL_ULT_GT3_IDS(info), \
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 	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
310
-	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
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 	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
312
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 	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
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 	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
..
..
@@ -336,45 +390,91 @@
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 	INTEL_VGA_DEVICE(0x3184, info), \
337
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 	INTEL_VGA_DEVICE(0x3185, info)
338
392
 
339
-#define INTEL_KBL_GT1_IDS(info)	\
340
-	INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
341
-	INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
393
+#define INTEL_KBL_ULT_GT1_IDS(info) \
342
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 	INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
395
+	INTEL_VGA_DEVICE(0x5913, info)  /* ULT GT1.5 */
396
+
397
+#define INTEL_KBL_ULX_GT1_IDS(info) \
343
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 	INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
399
+	INTEL_VGA_DEVICE(0x5915, info)  /* ULX GT1.5 */
400
+
401
+#define INTEL_KBL_GT1_IDS(info)	\
402
+	INTEL_KBL_ULT_GT1_IDS(info), \
403
+	INTEL_KBL_ULX_GT1_IDS(info), \
344
404
 	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
345
405
 	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
346
406
 	INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
347
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 	INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
348
408
 
349
-#define INTEL_KBL_GT2_IDS(info)	\
409
+#define INTEL_KBL_ULT_GT2_IDS(info) \
350
410
 	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
411
+	INTEL_VGA_DEVICE(0x5921, info)  /* ULT GT2F */
412
+
413
+#define INTEL_KBL_ULX_GT2_IDS(info) \
414
+	INTEL_VGA_DEVICE(0x591E, info)  /* ULX GT2 */
415
+
416
+#define INTEL_KBL_GT2_IDS(info)	\
417
+	INTEL_KBL_ULT_GT2_IDS(info), \
418
+	INTEL_KBL_ULX_GT2_IDS(info), \
351
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 	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
352
-	INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
353
-	INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
354
420
 	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
355
421
 	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
356
422
 	INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
357
423
 	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
358
424
 
425
+#define INTEL_KBL_ULT_GT3_IDS(info) \
426
+	INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
427
+
359
428
 #define INTEL_KBL_GT3_IDS(info) \
429
+	INTEL_KBL_ULT_GT3_IDS(info), \
360
430
 	INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
361
-	INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
362
431
 	INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
363
432
 
364
433
 #define INTEL_KBL_GT4_IDS(info) \
365
434
 	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
366
435
 
367
436
 /* AML/KBL Y GT2 */
368
-#define INTEL_AML_GT2_IDS(info) \
437
+#define INTEL_AML_KBL_GT2_IDS(info) \
369
438
 	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
370
439
 	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
440
+
441
+/* AML/CFL Y GT2 */
442
+#define INTEL_AML_CFL_GT2_IDS(info) \
443
+	INTEL_VGA_DEVICE(0x87CA, info)
444
+
445
+/* CML GT1 */
446
+#define INTEL_CML_GT1_IDS(info)	\
447
+	INTEL_VGA_DEVICE(0x9BA5, info), \
448
+	INTEL_VGA_DEVICE(0x9BA8, info), \
449
+	INTEL_VGA_DEVICE(0x9BA4, info), \
450
+	INTEL_VGA_DEVICE(0x9BA2, info)
451
+
452
+#define INTEL_CML_U_GT1_IDS(info) \
453
+	INTEL_VGA_DEVICE(0x9B21, info), \
454
+	INTEL_VGA_DEVICE(0x9BAA, info), \
455
+	INTEL_VGA_DEVICE(0x9BAC, info)
456
+
457
+/* CML GT2 */
458
+#define INTEL_CML_GT2_IDS(info)	\
459
+	INTEL_VGA_DEVICE(0x9BC5, info), \
460
+	INTEL_VGA_DEVICE(0x9BC8, info), \
461
+	INTEL_VGA_DEVICE(0x9BC4, info), \
462
+	INTEL_VGA_DEVICE(0x9BC2, info), \
463
+	INTEL_VGA_DEVICE(0x9BC6, info), \
464
+	INTEL_VGA_DEVICE(0x9BE6, info), \
465
+	INTEL_VGA_DEVICE(0x9BF6, info)
466
+
467
+#define INTEL_CML_U_GT2_IDS(info) \
468
+	INTEL_VGA_DEVICE(0x9B41, info), \
469
+	INTEL_VGA_DEVICE(0x9BCA, info), \
470
+	INTEL_VGA_DEVICE(0x9BCC, info)
371
471
 
372
472
 #define INTEL_KBL_IDS(info) \
373
473
 	INTEL_KBL_GT1_IDS(info), \
374
474
 	INTEL_KBL_GT2_IDS(info), \
375
475
 	INTEL_KBL_GT3_IDS(info), \
376
476
 	INTEL_KBL_GT4_IDS(info), \
377
-	INTEL_AML_GT2_IDS(info)
477
+	INTEL_AML_KBL_GT2_IDS(info)
378
478
 
379
479
 /* CFL S */
380
480
 #define INTEL_CFL_S_GT1_IDS(info) \
..
..
@@ -390,6 +490,9 @@
390
490
 	INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
391
491
 
392
492
 /* CFL H */
493
+#define INTEL_CFL_H_GT1_IDS(info) \
494
+	INTEL_VGA_DEVICE(0x3E9C, info)
495
+
393
496
 #define INTEL_CFL_H_GT2_IDS(info) \
394
497
 	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
395
498
 	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
..
..
@@ -407,30 +510,43 @@
407
510
 
408
511
 /* WHL/CFL U GT1 */
409
512
 #define INTEL_WHL_U_GT1_IDS(info) \
410
-	INTEL_VGA_DEVICE(0x3EA1, info)
513
+	INTEL_VGA_DEVICE(0x3EA1, info), \
514
+	INTEL_VGA_DEVICE(0x3EA4, info)
411
515
 
412
516
 /* WHL/CFL U GT2 */
413
517
 #define INTEL_WHL_U_GT2_IDS(info) \
414
-	INTEL_VGA_DEVICE(0x3EA0, info)
518
+	INTEL_VGA_DEVICE(0x3EA0, info), \
519
+	INTEL_VGA_DEVICE(0x3EA3, info)
415
520
 
416
521
 /* WHL/CFL U GT3 */
417
522
 #define INTEL_WHL_U_GT3_IDS(info) \
418
-	INTEL_VGA_DEVICE(0x3EA2, info), \
419
-	INTEL_VGA_DEVICE(0x3EA3, info), \
420
-	INTEL_VGA_DEVICE(0x3EA4, info)
523
+	INTEL_VGA_DEVICE(0x3EA2, info)
421
524
 
422
525
 #define INTEL_CFL_IDS(info)	   \
423
526
 	INTEL_CFL_S_GT1_IDS(info), \
424
527
 	INTEL_CFL_S_GT2_IDS(info), \
528
+	INTEL_CFL_H_GT1_IDS(info), \
425
529
 	INTEL_CFL_H_GT2_IDS(info), \
426
530
 	INTEL_CFL_U_GT2_IDS(info), \
427
531
 	INTEL_CFL_U_GT3_IDS(info), \
428
532
 	INTEL_WHL_U_GT1_IDS(info), \
429
533
 	INTEL_WHL_U_GT2_IDS(info), \
430
-	INTEL_WHL_U_GT3_IDS(info)
534
+	INTEL_WHL_U_GT3_IDS(info), \
535
+	INTEL_AML_CFL_GT2_IDS(info), \
536
+	INTEL_CML_GT1_IDS(info), \
537
+	INTEL_CML_GT2_IDS(info), \
538
+	INTEL_CML_U_GT1_IDS(info), \
539
+	INTEL_CML_U_GT2_IDS(info)
431
540
 
432
541
 /* CNL */
542
+#define INTEL_CNL_PORT_F_IDS(info) \
543
+	INTEL_VGA_DEVICE(0x5A54, info), \
544
+	INTEL_VGA_DEVICE(0x5A5C, info), \
545
+	INTEL_VGA_DEVICE(0x5A44, info), \
546
+	INTEL_VGA_DEVICE(0x5A4C, info)
547
+
433
548
 #define INTEL_CNL_IDS(info) \
549
+	INTEL_CNL_PORT_F_IDS(info), \
434
550
 	INTEL_VGA_DEVICE(0x5A51, info), \
435
551
 	INTEL_VGA_DEVICE(0x5A59, info), \
436
552
 	INTEL_VGA_DEVICE(0x5A41, info), \
..
..
@@ -440,22 +556,74 @@
440
556
 	INTEL_VGA_DEVICE(0x5A42, info), \
441
557
 	INTEL_VGA_DEVICE(0x5A4A, info), \
442
558
 	INTEL_VGA_DEVICE(0x5A50, info), \
443
-	INTEL_VGA_DEVICE(0x5A40, info), \
444
-	INTEL_VGA_DEVICE(0x5A54, info), \
445
-	INTEL_VGA_DEVICE(0x5A5C, info), \
446
-	INTEL_VGA_DEVICE(0x5A44, info), \
447
-	INTEL_VGA_DEVICE(0x5A4C, info)
559
+	INTEL_VGA_DEVICE(0x5A40, info)
448
560
 
449
561
 /* ICL */
450
-#define INTEL_ICL_11_IDS(info) \
562
+#define INTEL_ICL_PORT_F_IDS(info) \
451
563
 	INTEL_VGA_DEVICE(0x8A50, info), \
452
-	INTEL_VGA_DEVICE(0x8A51, info), \
453
564
 	INTEL_VGA_DEVICE(0x8A5C, info), \
454
-	INTEL_VGA_DEVICE(0x8A5D, info), \
565
+	INTEL_VGA_DEVICE(0x8A59, info),	\
566
+	INTEL_VGA_DEVICE(0x8A58, info),	\
455
567
 	INTEL_VGA_DEVICE(0x8A52, info), \
456
568
 	INTEL_VGA_DEVICE(0x8A5A, info), \
457
569
 	INTEL_VGA_DEVICE(0x8A5B, info), \
570
+	INTEL_VGA_DEVICE(0x8A57, info), \
571
+	INTEL_VGA_DEVICE(0x8A56, info), \
458
572
 	INTEL_VGA_DEVICE(0x8A71, info), \
459
-	INTEL_VGA_DEVICE(0x8A70, info)
573
+	INTEL_VGA_DEVICE(0x8A70, info), \
574
+	INTEL_VGA_DEVICE(0x8A53, info), \
575
+	INTEL_VGA_DEVICE(0x8A54, info)
576
+
577
+#define INTEL_ICL_11_IDS(info) \
578
+	INTEL_ICL_PORT_F_IDS(info), \
579
+	INTEL_VGA_DEVICE(0x8A51, info), \
580
+	INTEL_VGA_DEVICE(0x8A5D, info)
581
+
582
+/* EHL/JSL */
583
+#define INTEL_EHL_IDS(info) \
584
+	INTEL_VGA_DEVICE(0x4500, info),	\
585
+	INTEL_VGA_DEVICE(0x4571, info), \
586
+	INTEL_VGA_DEVICE(0x4551, info), \
587
+	INTEL_VGA_DEVICE(0x4541, info), \
588
+	INTEL_VGA_DEVICE(0x4E71, info), \
589
+	INTEL_VGA_DEVICE(0x4557, info), \
590
+	INTEL_VGA_DEVICE(0x4555, info), \
591
+	INTEL_VGA_DEVICE(0x4E61, info), \
592
+	INTEL_VGA_DEVICE(0x4E57, info), \
593
+	INTEL_VGA_DEVICE(0x4E55, info), \
594
+	INTEL_VGA_DEVICE(0x4E51, info)
595
+
596
+/* TGL */
597
+#define INTEL_TGL_12_GT1_IDS(info) \
598
+	INTEL_VGA_DEVICE(0x9A60, info), \
599
+	INTEL_VGA_DEVICE(0x9A68, info), \
600
+	INTEL_VGA_DEVICE(0x9A70, info)
601
+
602
+#define INTEL_TGL_12_GT2_IDS(info) \
603
+	INTEL_VGA_DEVICE(0x9A40, info), \
604
+	INTEL_VGA_DEVICE(0x9A49, info), \
605
+	INTEL_VGA_DEVICE(0x9A59, info), \
606
+	INTEL_VGA_DEVICE(0x9A78, info), \
607
+	INTEL_VGA_DEVICE(0x9AC0, info), \
608
+	INTEL_VGA_DEVICE(0x9AC9, info), \
609
+	INTEL_VGA_DEVICE(0x9AD9, info), \
610
+	INTEL_VGA_DEVICE(0x9AF8, info)
611
+
612
+#define INTEL_TGL_12_IDS(info) \
613
+	INTEL_TGL_12_GT1_IDS(info), \
614
+	INTEL_TGL_12_GT2_IDS(info)
615
+
616
+/* RKL */
617
+#define INTEL_RKL_IDS(info) \
618
+	INTEL_VGA_DEVICE(0x4C80, info), \
619
+	INTEL_VGA_DEVICE(0x4C8A, info), \
620
+	INTEL_VGA_DEVICE(0x4C8B, info), \
621
+	INTEL_VGA_DEVICE(0x4C8C, info), \
622
+	INTEL_VGA_DEVICE(0x4C90, info), \
623
+	INTEL_VGA_DEVICE(0x4C9A, info)
624
+
625
+/* DG1 */
626
+#define INTEL_DG1_IDS(info) \
627
+	INTEL_VGA_DEVICE(0x4905, info)
460
628
 
461
629
 #endif /* _I915_PCIIDS_H */