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hc

2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6

 kernel/drivers/mmc/host/dw_mmc.c
..
..
@@ -124,6 +124,8 @@
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124
 EXPORT_SYMBOL(rv1106_sdmmc_put_lock);
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 #endif
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127
+#define RV1106_RAMDON_DATA_SIZE 508
128
+
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 #if defined(CONFIG_DEBUG_FS)
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 static int dw_mci_req_show(struct seq_file *s, void *v)
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 {
..
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@@ -525,8 +527,7 @@
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 		tasklet_schedule(&host->tasklet);
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 	}
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528
-	if (host->need_xfer_timer &&
529
-	    host->dir_status == DW_MCI_RECV_STATUS)
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+	if (host->need_xfer_timer)
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531
 		del_timer(&host->xfer_timer);
531
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 }
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533
 
..
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@@ -739,7 +740,7 @@
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 	if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) {
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 		desc->des0 = desc_last->des0;
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 		desc->des2 = desc_last->des2;
742
-		desc->des1 = 0x8; /* Random dirty data for last one desc */
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+		desc->des1 = RV1106_RAMDON_DATA_SIZE; /* Random dirty data for last one desc */
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 		desc_last = desc;
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 	}
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746
 
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@@ -1447,13 +1448,6 @@
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 		return;
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 	}
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1450
 
1450
-	if (host->is_rv1106_sd) {
1451
-		u32 reg;
1452
-
1453
-		readl_poll_timeout(host->regs + SDMMC_STATUS, reg,
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-				   reg & BIT(2), USEC_PER_MSEC, 500 * USEC_PER_MSEC);
1455
-	}
1456
-
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 	spin_lock_bh(&host->lock);
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1452
 
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 	if (host->is_rv1106_sd)
..
..
@@ -1549,9 +1543,11 @@
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1543
 				slot->host->vqmmc_enabled = true;
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 			}
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1545
 
1546
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT_MMC
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 			/* Reset our state machine after powering on */
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 			dw_mci_ctrl_reset(slot->host,
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 					  SDMMC_CTRL_ALL_RESET_FLAGS);
1550
+#endif
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1551
 		}
1556
1552
 
1557
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 		/* Adjust clock / bus width after power is up */
..
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@@ -1874,6 +1870,9 @@
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 	WARN_ON(host->cmd || host->data);
1876
1872
 
1873
+	if (host->need_xfer_timer)
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+		del_timer(&host->xfer_timer);
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+
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 	host->slot->mrq = NULL;
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 	host->mrq = NULL;
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1878
 	if (!list_empty(&host->queue)) {
..
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@@ -2019,8 +2018,10 @@
2019
2018
 				   host->bus_hz);
2020
2019
 
2021
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 	/* add a bit spare time */
2022
-	xfer_ms += 100;
2023
-
2021
+	if (host->dir_status == DW_MCI_RECV_STATUS)
2022
+		xfer_ms += 100;
2023
+	else
2024
+		xfer_ms += 2500;
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 	spin_lock_irqsave(&host->irq_lock, irqflags);
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 	if (!test_bit(EVENT_XFER_COMPLETE, &host->pending_events))
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2027
 		mod_timer(&host->xfer_timer,
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@@ -2155,6 +2156,13 @@
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 					send_stop_abort(host, data);
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 				dw_mci_stop_dma(host);
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 				state = STATE_DATA_ERROR;
2159
+				if (host->dir_status == DW_MCI_SEND_STATUS) {
2160
+					data->bytes_xfered = 0;
2161
+					data->error = -ETIMEDOUT;
2162
+					host->data = NULL;
2163
+					dw_mci_request_end(host, mrq);
2164
+					goto unlock;
2165
+				}
2158
2166
 				break;
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2167
 			}
2160
2168
 
..
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@@ -2166,8 +2174,7 @@
2166
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 				 */
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 				if (host->dir_status == DW_MCI_RECV_STATUS)
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 					dw_mci_set_drto(host);
2169
-				if (host->need_xfer_timer &&
2170
-				    host->dir_status == DW_MCI_RECV_STATUS)
2177
+				if (host->need_xfer_timer)
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 					dw_mci_set_xfer_timeout(host);
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 				break;
2173
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 			}
..
..
@@ -2209,6 +2216,8 @@
2209
2216
 				 */
2210
2217
 				if (host->dir_status == DW_MCI_RECV_STATUS)
2211
2218
 					dw_mci_set_drto(host);
2219
+				if (host->need_xfer_timer && host->dir_status == DW_MCI_SEND_STATUS)
2220
+					dw_mci_set_xfer_timeout(host);
2212
2221
 				break;
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2222
 			}
2214
2223
 
..
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@@ -2225,8 +2234,19 @@
2225
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 				}
2226
2235
 
2227
2236
 				/* stop command for open-ended transfer*/
2228
-				if (data->stop)
2237
+				if (data->stop) {
2238
+					if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) {
2239
+						int fifo_count;
2240
+
2241
+						if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, fifo_count,
2242
+								((fifo_count >> 17) & 0x7FF) <= RV1106_RAMDON_DATA_SIZE / 4,
2243
+								0, 5000 * USEC_PER_MSEC))
2244
+							data->error = -ETIMEDOUT;
2245
+						udelay(1);
2246
+						dw_mci_reset(host);
2247
+					}
2229
2248
 					send_stop_abort(host, data);
2249
+				}
2230
2250
 			} else {
2231
2251
 				/*
2232
2252
 				 * If we don't have a command complete now we'll
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..
@@ -2757,8 +2777,7 @@
2757
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 			del_timer(&host->cto_timer);
2758
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 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
2759
2779
 			host->cmd_status = pending;
2760
-			if ((host->need_xfer_timer) &&
2761
-			     host->dir_status == DW_MCI_RECV_STATUS)
2780
+			if (host->need_xfer_timer)
2762
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 				del_timer(&host->xfer_timer);
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2782
 			smp_wmb(); /* drain writebuffer */
2764
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 			set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
..
..
@@ -3663,7 +3682,7 @@
3663
3682
 		mci_writel(host, INTMASK, ret);
3664
3683
 	}
3665
3684
 
3666
-	if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
3685
+	if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
3667
3686
 		dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios);
3668
3687
 
3669
3688
 	/* Force setup bus to guarantee available clock output */