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hc

2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6

 kernel/drivers/devfreq/rockchip_dmc_dbg.c
..
..
@@ -74,11 +74,10 @@
74
74
 
75
75
 struct dram_info {
76
76
 	unsigned int version;
77
-	char dramtype[12];
77
+	char dramtype[10];
78
78
 	unsigned int dramfreq;
79
79
 	unsigned int channel_num;
80
80
 	struct dram_cap_info ch[2];
81
-	unsigned int dramid[3];
82
81
 };
83
82
 
84
83
 static const char * const power_save_msg[] = {
..
..
@@ -193,9 +192,9 @@
193
192
 {
194
193
 	struct arm_smccc_res res;
195
194
 	struct dram_info *p_dram_info;
196
-	struct file *fp = NULL;
197
-	char cur_freq[20] = { 0 };
198
-	char governor[20] = { 0 };
195
+	struct file *fp  = NULL;
196
+	char cur_freq[20] = {0};
197
+	char governor[20] = {0};
199
198
 	loff_t pos;
200
199
 	u32 i;
201
200
 
..
..
@@ -206,11 +205,6 @@
206
205
 			   res.a0);
207
206
 		return -ENOMEM;
208
207
 	}
209
-	if (res.a1) {
210
-		seq_printf(m, "ddrdbg function get dram info error:%lx\n",
211
-			   res.a1);
212
-		return -EPERM;
213
-	}
214
208
 
215
209
 	if (!dmcdbg_data.inited_flag) {
216
210
 		seq_puts(m, "dmcdbg_data no int\n");
..
..
@@ -219,27 +213,25 @@
219
213
 	p_dram_info = (struct dram_info *)dmcdbg_data.share_memory;
220
214
 
221
215
 	/* dram type information */
222
-	seq_printf(m, "DramType:	%s\n", p_dram_info->dramtype);
223
-	if (p_dram_info->version >= 0x2) {
224
-		if ((strcmp(p_dram_info->dramtype, "LPDDR2") == 0) ||
225
-		    (strcmp(p_dram_info->dramtype, "LPDDR3") == 0) ||
226
-		    (strcmp(p_dram_info->dramtype, "LPDDR4") == 0) ||
227
-		    (strcmp(p_dram_info->dramtype, "LPDDR4X") == 0))
228
-			seq_printf(m,
229
-				   "Dram ID:	MR5=0x%x,MR6=0x%x,MR7=0x%x\n",
230
-				   p_dram_info->dramid[0],
231
-				   p_dram_info->dramid[1],
232
-				   p_dram_info->dramid[2]);
233
-		else
234
-			seq_printf(m, "Dram ID:	None\n");
235
-	}
216
+	seq_printf(m,
217
+		   "DramType:	%s\n"
218
+		   ,
219
+		   p_dram_info->dramtype
220
+		   );
221
+
236
222
 	/* dram capacity information */
237
-	seq_printf(m, "\n"
238
-		      "DramCapacity:\n");
223
+	seq_printf(m,
224
+		   "\n"
225
+		   "DramCapacity:\n"
226
+		   );
239
227
 
240
228
 	for (i = 0; i < p_dram_info->channel_num; i++) {
241
229
 		if (p_dram_info->channel_num == 2)
242
-			seq_printf(m, "Channel [%d]:\n", i);
230
+			seq_printf(m,
231
+				   "Channel [%d]:\n"
232
+				   ,
233
+				   i
234
+				   );
243
235
 
244
236
 		seq_printf(m,
245
237
 			   "CS Count:	%d\n"
..
..
@@ -249,7 +241,8 @@
249
241
 			   "CS0_Row:	%d\n"
250
242
 			   "CS1_Row:	%d\n"
251
243
 			   "DieBusWidth:	%d bit\n"
252
-			   "TotalSize:	%d MB\n",
244
+			   "TotalSize:	%d MB\n"
245
+			   ,
253
246
 			   p_dram_info->ch[i].rank,
254
247
 			   p_dram_info->ch[i].buswidth,
255
248
 			   p_dram_info->ch[i].col,
..
..
@@ -257,7 +250,8 @@
257
250
 			   p_dram_info->ch[i].cs0_row,
258
251
 			   p_dram_info->ch[i].cs1_row,
259
252
 			   p_dram_info->ch[i].die_buswidth,
260
-			   p_dram_info->ch[i].size);
253
+			   p_dram_info->ch[i].size
254
+			   );
261
255
 	}
262
256
 
263
257
 	/* check devfreq/dmc device */
..
..
@@ -266,8 +260,10 @@
266
260
 		seq_printf(m,
267
261
 			   "\n"
268
262
 			   "devfreq/dmc:	Disable\n"
269
-			   "DramFreq:	%d\n",
270
-			   p_dram_info->dramfreq);
263
+			   "DramFreq:	%d\n"
264
+			   ,
265
+			   p_dram_info->dramfreq
266
+			   );
271
267
 	} else {
272
268
 		pos = 0;
273
269
 		kernel_read(fp, cur_freq, sizeof(cur_freq), &pos);
..
..
@@ -286,11 +282,15 @@
286
282
 			   "\n"
287
283
 			   "devfreq/dmc:	Enable\n"
288
284
 			   "governor:	%s\n"
289
-			   "cur_freq:	%s\n",
290
-			   governor, cur_freq);
285
+			   "cur_freq:	%s\n"
286
+			   ,
287
+			   governor,
288
+			   cur_freq
289
+			   );
291
290
 		seq_printf(m,
292
291
 			   "NOTE:\n"
293
-			   "more information about dmc can get from /sys/class/devfreq/dmc.\n");
292
+			   "more information about dmc can get from /sys/class/devfreq/dmc.\n"
293
+			   );
294
294
 	}
295
295
 
296
296
 	return 0;
..
..
@@ -340,15 +340,19 @@
340
340
 	}
341
341
 	p_power = (struct power_save_info *)dmcdbg_data.share_memory;
342
342
 
343
-	seq_printf(m, "low power information:\n"
344
-		      "\n"
345
-		      "[number]name: value\n");
343
+	seq_printf(m,
344
+		   "low power information:\n"
345
+		   "\n"
346
+		   "[number]name: value\n"
347
+		   );
346
348
 
347
349
 	p_uint = (unsigned int *)p_power;
348
350
 	for (i = 0; i < ARRAY_SIZE(power_save_msg); i++)
349
351
 		seq_printf(m,
350
-			   "[%d]%s: %d\n",
351
-			   i, power_save_msg[i], *(p_uint + i));
352
+			   "[%d]%s: %d\n"
353
+			   ,
354
+			   i, power_save_msg[i], *(p_uint + i)
355
+			   );
352
356
 
353
357
 	seq_printf(m,
354
358
 		   "\n"
..
..
@@ -360,7 +364,8 @@
360
364
 		   "Support for setting multiple parameters at the same time.\n"
361
365
 		   "echo number=value,number=value,... > /proc/dmcdbg/powersave\n"
362
366
 		   "eg:\n"
363
-		   "  echo 0=1,1=32 > /proc/dmcdbg/powersave\n");
367
+		   "  echo 0=1,1=32 > /proc/dmcdbg/powersave\n"
368
+		   );
364
369
 
365
370
 	return 0;
366
371
 }
..
..
@@ -497,34 +502,48 @@
497
502
 	}
498
503
 	p_drvodt = (struct drv_odt_info *)dmcdbg_data.share_memory;
499
504
 
500
-	seq_printf(m, "drv and odt information:\n"
501
-		      "\n"
502
-		      "[number]name: value (ohm)\n");
505
+	seq_printf(m,
506
+		   "drv and odt information:\n"
507
+		   "\n"
508
+		   "[number]name: value (ohm)\n"
509
+	);
503
510
 
504
511
 	p_uint = (unsigned int *)p_drvodt;
505
512
 	for (i = 0; i < ARRAY_SIZE(drv_odt_msg); i++) {
506
513
 		if (*(p_uint + (i * 3)) == DRV_ODT_UNKNOWN)
507
514
 			seq_printf(m,
508
-				   "[%2d]%s: NULL (unknown) %c\n",
515
+				   "[%2d]%s: NULL (unknown) %c\n"
516
+				   ,
509
517
 				   i, drv_odt_msg[i],
510
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
518
+				   (*(p_uint + (i * 3) + 2) ==
519
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
520
+			);
511
521
 		else if (*(p_uint + (i * 3) + 1) == DRV_ODT_UNKNOWN)
512
522
 			seq_printf(m,
513
-				   "[%2d]%s: %d (unknown) %c\n",
523
+				   "[%2d]%s: %d (unknown) %c\n"
524
+				   ,
514
525
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
515
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
526
+				   (*(p_uint + (i * 3) + 2) ==
527
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
528
+			);
516
529
 		else if (i < (ARRAY_SIZE(drv_odt_msg) - 2))
517
530
 			seq_printf(m,
518
-				   "[%2d]%s: %d (%d ohm) %c\n",
531
+				   "[%2d]%s: %d (%d ohm) %c\n"
532
+				   ,
519
533
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
520
534
 				   *(p_uint + (i * 3) + 1),
521
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
535
+				   (*(p_uint + (i * 3) + 2) ==
536
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
537
+			);
522
538
 		else
523
539
 			seq_printf(m,
524
-				   "[%2d]%s: %d (%d %%) %c\n",
540
+				   "[%2d]%s: %d (%d %%) %c\n"
541
+				   ,
525
542
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
526
543
 				   *(p_uint + (i * 3) + 1),
527
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
544
+				   (*(p_uint + (i * 3) + 2) ==
545
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
546
+			);
528
547
 	}
529
548
 
530
549
 	seq_printf(m,
..
..
@@ -539,7 +558,8 @@
539
558
 		   "eg: set soc side ca drv up and down to 20\n"
540
559
 		   "  echo 6=20,7=20 > /proc/dmcdbg/drvodt\n"
541
560
 		   "Note: Please update both up and down at the same time.\n"
542
-		   "      (*) mean unsupported setting value\n");
561
+		   "      (*) mean unsupported setting value\n"
562
+	);
543
563
 
544
564
 	return 0;
545
565
 }
..
..
@@ -674,20 +694,28 @@
674
694
 		return -EPERM;
675
695
 	}
676
696
 
677
-	seq_printf(m, "de-skew information:\n"
678
-		      "\n"
679
-		      "[group_number]name: value\n");
697
+	seq_printf(m,
698
+		   "de-skew information:\n"
699
+		   "\n"
700
+		   "[group_number]name: value\n"
701
+	);
680
702
 
681
703
 	for (group = 0; group < dmcdbg_data.skew_group_num; group++) {
682
704
 		if (dmcdbg_data.skew_group[group].note != NULL)
683
-			seq_printf(m, "%s\n",
684
-				   dmcdbg_data.skew_group[group].note);
705
+			seq_printf(m,
706
+				"%s\n"
707
+				,
708
+				dmcdbg_data.skew_group[group].note
709
+			);
685
710
 		p_uint = (unsigned int *)dmcdbg_data.skew_group[group].p_skew_info;
686
711
 		for (i = 0; i < dmcdbg_data.skew_group[group].skew_num; i++)
687
-			seq_printf(m, "[%c%d_%d]%s: %d\n",
688
-				   (i < 10) ? ' ' : '\0', group, i,
689
-				   dmcdbg_data.skew_group[group].p_skew_timing[i],
690
-				   *(p_uint + i));
712
+			seq_printf(m,
713
+				"[%c%d_%d]%s: %d\n"
714
+				,
715
+				(i < 10) ? ' ' : '\0', group, i,
716
+				dmcdbg_data.skew_group[group].p_skew_timing[i],
717
+				*(p_uint + i)
718
+			);
691
719
 	}
692
720
 
693
721
 	seq_printf(m,
..
..
@@ -700,7 +728,8 @@
700
728
 		   "Support for setting multiple parameters simultaneously.\n"
701
729
 		   "echo group_number=value,group_number=value,... > /proc/dmcdbg/deskew\n"
702
730
 		   "eg:\n"
703
-		   "  echo 0_1=8,1_2=8 > /proc/dmcdbg/deskew\n");
731
+		   "  echo 0_1=8,1_2=8 > /proc/dmcdbg/deskew\n"
732
+	);
704
733
 
705
734
 	return 0;
706
735
 }
..
..
@@ -847,13 +876,18 @@
847
876
 	}
848
877
 	p_regsinfo = (struct registers_info *)dmcdbg_data.share_memory;
849
878
 
850
-	seq_printf(m, "registers base address information:\n"
851
-		      "\n");
879
+	seq_printf(m,
880
+		   "registers base address information:\n"
881
+		   "\n"
882
+	);
852
883
 
853
884
 	for (i = 0; i < p_regsinfo->regs_num; i++) {
854
-		seq_printf(m, "%s=0x%x\n",
885
+		seq_printf(m,
886
+			   "%s=0x%x\n"
887
+			   ,
855
888
 			   p_regsinfo->regs[i].regs_name,
856
-			   p_regsinfo->regs[i].regs_addr);
889
+			   p_regsinfo->regs[i].regs_addr
890
+			   );
857
891
 	}
858
892
 
859
893
 	return 0;
..
..
@@ -870,56 +904,6 @@
870
904
 	.llseek		= seq_lseek,
871
905
 	.release	= single_release,
872
906
 };
873
-
874
-static int rk_dmcdbg_sip_smc_match_ver(struct platform_device *pdev,
875
-				       u32 match_ver)
876
-{
877
-	struct arm_smccc_res res;
878
-
879
-	/* check ddr_debug_func version */
880
-	res = sip_smc_dram(0, DDRDBG_FUNC_GET_VERSION,
881
-			   ROCKCHIP_SIP_CONFIG_DRAM_DEBUG);
882
-	dev_notice(&pdev->dev, "current ATF ddr_debug_func version 0x%lx.\n",
883
-		   res.a1);
884
-	/*
885
-	 * [15:8] major version, [7:0] minor version
886
-	 * major version must match both kernel dmcdbg and ATF ddr_debug_func.
887
-	 */
888
-	if (res.a0 || res.a1 < match_ver || ((res.a1 & 0xff00) != (match_ver & 0xff00))) {
889
-		dev_err(&pdev->dev,
890
-			"version invalid, need update to 0x%x or newer, the major version unmatch!\n",
891
-			match_ver);
892
-
893
-		return -ENXIO;
894
-	}
895
-
896
-	return 0;
897
-}
898
-
899
-static int proc_dmcdbg_init(struct platform_device *pdev)
900
-{
901
-	struct arm_smccc_res res;
902
-
903
-	/* request share memory for pass parameter */
904
-	res = sip_smc_request_share_mem(DMCDBG_PAGE_NUMS,
905
-					SHARE_PAGE_TYPE_DDRDBG);
906
-	if (res.a0 != 0) {
907
-		dev_err(&pdev->dev, "request share mem error!\n");
908
-		return -ENOMEM;
909
-	}
910
-
911
-	dmcdbg_data.share_memory = (void __iomem *)res.a1;
912
-	dmcdbg_data.inited_flag = 1;
913
-
914
-	/* create parent dir in /proc */
915
-	proc_dmcdbg_dir = proc_mkdir(PROC_DMCDBG_DIR_NAME, NULL);
916
-	if (!proc_dmcdbg_dir) {
917
-		dev_err(&pdev->dev, "create proc dir error!\n");
918
-		return -ENOENT;
919
-	}
920
-
921
-	return 0;
922
-}
923
907
 
924
908
 static int proc_regsinfo_init(void)
925
909
 {
..
..
@@ -984,18 +968,42 @@
984
968
 static __maybe_unused int rv1126_dmcdbg_init(struct platform_device *pdev,
985
969
 					     struct rockchip_dmcdbg *dmcdbg)
986
970
 {
987
-	u32 version = 0x102;
988
-	int ret;
971
+	struct arm_smccc_res res;
989
972
 
990
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
991
-	if (ret)
992
-		return ret;
973
+	/* check ddr_debug_func version */
974
+	res = sip_smc_dram(0, DDRDBG_FUNC_GET_VERSION,
975
+			   ROCKCHIP_SIP_CONFIG_DRAM_DEBUG);
976
+	dev_notice(&pdev->dev, "current ATF ddr_debug_func version 0x%lx.\n",
977
+		   res.a1);
978
+	/*
979
+	 * [15:8] major version, [7:0] minor version
980
+	 * major version must match both kernel dmcdbg and ATF ddr_debug_func.
981
+	 */
982
+	if (res.a0 || res.a1 < 0x101 || ((res.a1 & 0xff00) != 0x100)) {
983
+		dev_err(&pdev->dev,
984
+			"version invalid,need update,the major version unmatch!\n");
985
+		return -ENXIO;
986
+	}
993
987
 
994
-	ret = proc_dmcdbg_init(pdev);
995
-	if (ret)
996
-		return ret;
988
+	/* request share memory for pass parameter */
989
+	res = sip_smc_request_share_mem(DMCDBG_PAGE_NUMS,
990
+					SHARE_PAGE_TYPE_DDRDBG);
991
+	if (res.a0 != 0) {
992
+		dev_err(&pdev->dev, "request share mem error\n");
993
+		return -ENOMEM;
994
+	}
995
+
996
+	dmcdbg_data.share_memory = (void __iomem *)res.a1;
997
+	dmcdbg_data.inited_flag = 1;
997
998
 
998
999
 	rv1126_get_skew_parameter();
1000
+
1001
+	/* create parent dir in /proc */
1002
+	proc_dmcdbg_dir = proc_mkdir(PROC_DMCDBG_DIR_NAME, NULL);
1003
+	if (!proc_dmcdbg_dir) {
1004
+		dev_err(&pdev->dev, "create proc dir error!");
1005
+		return -ENOENT;
1006
+	}
999
1007
 
1000
1008
 	proc_dmcinfo_init();
1001
1009
 	proc_powersave_init();
..
..
@@ -1005,54 +1013,8 @@
1005
1013
 	return 0;
1006
1014
 }
1007
1015
 
1008
-static __maybe_unused int px30_dmcdbg_init(struct platform_device *pdev,
1009
-					   struct rockchip_dmcdbg *dmcdbg)
1010
-{
1011
-	u32 version = 0x101;
1012
-	int ret;
1013
-
1014
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
1015
-	if (ret)
1016
-		return ret;
1017
-
1018
-	ret = proc_dmcdbg_init(pdev);
1019
-	if (ret)
1020
-		return ret;
1021
-
1022
-	proc_dmcinfo_init();
1023
-
1024
-	return 0;
1025
-}
1026
-
1027
-static __maybe_unused int rk3568_dmcdbg_init(struct platform_device *pdev,
1028
-					     struct rockchip_dmcdbg *dmcdbg)
1029
-{
1030
-	u32 version = 0x101;
1031
-	int ret;
1032
-
1033
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
1034
-	if (ret)
1035
-		return ret;
1036
-
1037
-	ret = proc_dmcdbg_init(pdev);
1038
-	if (ret)
1039
-		return ret;
1040
-
1041
-	proc_dmcinfo_init();
1042
-
1043
-	return 0;
1044
-}
1045
-
1046
1016
 static const struct of_device_id rockchip_dmcdbg_of_match[] = {
1047
-#ifdef CONFIG_CPU_PX30
1048
-	{ .compatible = "rockchip,px30-dmcdbg", .data = px30_dmcdbg_init },
1049
-#endif
1050
-#ifdef CONFIG_CPU_RV1126
1051
-	{ .compatible = "rockchip,rv1126-dmcdbg", .data = rv1126_dmcdbg_init },
1052
-#endif
1053
-#ifdef CONFIG_CPU_RK3568
1054
-	{ .compatible = "rockchip,rk3568-dmcdbg", .data = rk3568_dmcdbg_init },
1055
-#endif
1017
+	{ .compatible = "rockchip,rv1126-dmcdbg", .data = rv1126_dmcdbg_init},
1056
1018
 	{ },
1057
1019
 };
1058
1020
 MODULE_DEVICE_TABLE(of, rockchip_dmcdbg_of_match);