| .. | .. |
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| 33 | 33 | ctl.u64 = 0; |
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| 34 | 34 | ctl.s.ent_en = 1; /* Enable the entropy source. */ |
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| 35 | 35 | ctl.s.rng_en = 1; /* Enable the RNG hardware. */ |
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| 36 | | - cvmx_write_csr((u64)p->control_status, ctl.u64); |
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| 36 | + cvmx_write_csr((__force u64)p->control_status, ctl.u64); |
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| 37 | 37 | return 0; |
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| 38 | 38 | } |
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| 39 | 39 | |
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| .. | .. |
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| 44 | 44 | |
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| 45 | 45 | ctl.u64 = 0; |
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| 46 | 46 | /* Disable everything. */ |
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| 47 | | - cvmx_write_csr((u64)p->control_status, ctl.u64); |
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| 47 | + cvmx_write_csr((__force u64)p->control_status, ctl.u64); |
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| 48 | 48 | } |
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| 49 | 49 | |
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| 50 | 50 | static int octeon_rng_data_read(struct hwrng *rng, u32 *data) |
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| 51 | 51 | { |
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| 52 | 52 | struct octeon_rng *p = container_of(rng, struct octeon_rng, ops); |
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| 53 | 53 | |
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| 54 | | - *data = cvmx_read64_uint32((u64)p->result); |
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| 54 | + *data = cvmx_read64_uint32((__force u64)p->result); |
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| 55 | 55 | return sizeof(u32); |
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| 56 | 56 | } |
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| 57 | 57 | |
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| .. | .. |
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| 81 | 81 | return -ENOENT; |
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| 82 | 82 | |
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| 83 | 83 | |
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| 84 | | - rng->control_status = devm_ioremap_nocache(&pdev->dev, |
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| 84 | + rng->control_status = devm_ioremap(&pdev->dev, |
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| 85 | 85 | res_ports->start, |
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| 86 | 86 | sizeof(u64)); |
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| 87 | 87 | if (!rng->control_status) |
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| 88 | 88 | return -ENOENT; |
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| 89 | 89 | |
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| 90 | | - rng->result = devm_ioremap_nocache(&pdev->dev, |
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| 90 | + rng->result = devm_ioremap(&pdev->dev, |
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| 91 | 91 | res_result->start, |
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| 92 | 92 | sizeof(u64)); |
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| 93 | 93 | if (!rng->result) |
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