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hc
2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6 
 kernel/arch/mips/include/asm/asm.h
....@@ -20,36 +20,27 @@
2020 #include <asm/sgidefs.h>
2121 #include <asm/asm-eva.h>
2222 
23
-#ifndef CAT
24
-#ifdef __STDC__
25
-#define __CAT(str1, str2) str1##str2
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-#else
27
-#define __CAT(str1, str2) str1/**/str2
28
-#endif
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-#define CAT(str1, str2) __CAT(str1, str2)
30
-#endif
31
-
23
+#ifndef __VDSO__
3224 /*
33
- * PIC specific declarations
34
- * Not used for the kernel but here seems to be the right place.
25
+ * Emit CFI data in .debug_frame sections, not .eh_frame sections.
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+ * We don't do DWARF unwinding at runtime, so only the offline DWARF
27
+ * information is useful to anyone. Note we should change this if we
28
+ * ever decide to enable DWARF unwinding at runtime.
3529  */
36
-#ifdef __PIC__
37
-#define CPRESTORE(register)				\
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-		.cprestore register
39
-#define CPADD(register)					\
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-		.cpadd	register
41
-#define CPLOAD(register)				\
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-		.cpload register
30
+#define CFI_SECTIONS	.cfi_sections .debug_frame
4331 #else
44
-#define CPRESTORE(register)
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-#define CPADD(register)
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-#define CPLOAD(register)
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+ /*
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+  * For the vDSO, emit both runtime unwind information and debug
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+  * symbols for the .dbg file.
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+  */
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+#define CFI_SECTIONS
4737 #endif
4838 
4939 /*
5040  * LEAF - declare leaf routine
5141  */
5242 #define LEAF(symbol)					\
43
+		CFI_SECTIONS;				\
5344 		.globl	symbol;				\
5445 		.align	2;				\
5546 		.type	symbol, @function;		\
....@@ -62,6 +53,7 @@
6253  * NESTED - declare nested routine entry point
6354  */
6455 #define NESTED(symbol, framesize, rpc)			\
56
+		CFI_SECTIONS;				\
6557 		.globl	symbol;				\
6658 		.align	2;				\
6759 		.type	symbol, @function;		\
....@@ -100,10 +92,15 @@
10092 		.globl	symbol;				\
10193 symbol		=	value
10294 
103
-#define PANIC(msg)					\
95
+#define TEXT(msg)					\
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+		.pushsection .data;			\
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+8:		.asciiz msg;				\
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+		.popsection;
99
+
100
+#define ASM_PANIC(msg)					\
104101 		.set	push;				\
105102 		.set	reorder;			\
106
-		PTR_LA	a0, 8f;				 \
103
+		PTR_LA	a0, 8f;				\
107104 		jal	panic;				\
108105 9:		b	9b;				\
109106 		.set	pop;				\
....@@ -113,111 +110,16 @@
113110  * Print formatted string
114111  */
115112 #ifdef CONFIG_PRINTK
116
-#define PRINT(string)					\
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+#define ASM_PRINT(string)				\
117114 		.set	push;				\
118115 		.set	reorder;			\
119
-		PTR_LA	a0, 8f;				 \
116
+		PTR_LA	a0, 8f;				\
120117 		jal	printk;				\
121118 		.set	pop;				\
122119 		TEXT(string)
123120 #else
124
-#define PRINT(string)
121
+#define ASM_PRINT(string)
125122 #endif
126
-
127
-#define TEXT(msg)					\
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-		.pushsection .data;			\
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-8:		.asciiz msg;				\
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-		.popsection;
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-
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-/*
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- * Build text tables
134
- */
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-#define TTABLE(string)					\
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-		.pushsection .text;			\
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-		.word	1f;				\
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-		.popsection				\
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-		.pushsection .data;			\
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-1:		.asciiz string;				\
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-		.popsection
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-
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-/*
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- * MIPS IV pref instruction.
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- * Use with .set noreorder only!
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- *
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- * MIPS IV implementations are free to treat this as a nop.  The R5000
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- * is one of them.  So we should have an option not to use this instruction.
149
- */
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-#ifdef CONFIG_CPU_HAS_PREFETCH
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-
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-#define PREF(hint,addr)					\
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-		.set	push;				\
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-		.set	arch=r5000;			\
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-		pref	hint, addr;			\
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-		.set	pop
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-
158
-#define PREFE(hint, addr)				\
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-		.set	push;				\
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-		.set	mips0;				\
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-		.set	eva;				\
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-		prefe	hint, addr;			\
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-		.set	pop
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-
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-#define PREFX(hint,addr)				\
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-		.set	push;				\
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-		.set	arch=r5000;			\
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-		prefx	hint, addr;			\
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-		.set	pop
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-
171
-#else /* !CONFIG_CPU_HAS_PREFETCH */
172
-
173
-#define PREF(hint, addr)
174
-#define PREFE(hint, addr)
175
-#define PREFX(hint, addr)
176
-
177
-#endif /* !CONFIG_CPU_HAS_PREFETCH */
178
-
179
-/*
180
- * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
181
- */
182
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
183
-#define MOVN(rd, rs, rt)				\
184
-		.set	push;				\
185
-		.set	reorder;			\
186
-		beqz	rt, 9f;				\
187
-		move	rd, rs;				\
188
-		.set	pop;				\
189
-9:
190
-#define MOVZ(rd, rs, rt)				\
191
-		.set	push;				\
192
-		.set	reorder;			\
193
-		bnez	rt, 9f;				\
194
-		move	rd, rs;				\
195
-		.set	pop;				\
196
-9:
197
-#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
198
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
199
-#define MOVN(rd, rs, rt)				\
200
-		.set	push;				\
201
-		.set	noreorder;			\
202
-		bnezl	rt, 9f;				\
203
-		 move	rd, rs;				\
204
-		.set	pop;				\
205
-9:
206
-#define MOVZ(rd, rs, rt)				\
207
-		.set	push;				\
208
-		.set	noreorder;			\
209
-		beqzl	rt, 9f;				\
210
-		 move	rd, rs;				\
211
-		.set	pop;				\
212
-9:
213
-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
214
-#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
215
-    (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
216
-#define MOVN(rd, rs, rt)				\
217
-		movn	rd, rs, rt
218
-#define MOVZ(rd, rs, rt)				\
219
-		movz	rd, rs, rt
220
-#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */
221123 
222124 /*
223125  * Stack alignment
....@@ -318,7 +220,9 @@
318220 #define LONG_SRA	sra
319221 #define LONG_SRAV	srav
320222 
223
+#ifdef __ASSEMBLY__
321224 #define LONG		.word
225
+#endif
322226 #define LONGSIZE	4
323227 #define LONGMASK	3
324228 #define LONGLOG		2
....@@ -341,7 +245,9 @@
341245 #define LONG_SRA	dsra
342246 #define LONG_SRAV	dsrav
343247 
248
+#ifdef __ASSEMBLY__
344249 #define LONG		.dword
250
+#endif
345251 #define LONGSIZE	8
346252 #define LONGMASK	7
347253 #define LONGLOG		3