forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6
kernel/arch/ia64/include/asm/io.h
....@@ -71,7 +71,6 @@
7171 #define HAVE_ARCH_PIO_SIZE
7272
7373 #include <asm/intrinsics.h>
74
-#include <asm/machvec.h>
7574 #include <asm/page.h>
7675 #include <asm-generic/iomap.h>
7776
....@@ -113,20 +112,6 @@
113112 */
114113 #define __ia64_mf_a() ia64_mfa()
115114
116
-/**
117
- * ___ia64_mmiowb - I/O write barrier
118
- *
119
- * Ensure ordering of I/O space writes. This will make sure that writes
120
- * following the barrier will arrive after all previous writes. For most
121
- * ia64 platforms, this is a simple 'mf.a' instruction.
122
- *
123
- * See Documentation/driver-api/device-io.rst for more information.
124
- */
125
-static inline void ___ia64_mmiowb(void)
126
-{
127
- ia64_mfa();
128
-}
129
-
130115 static inline void*
131116 __ia64_mk_io_addr (unsigned long port)
132117 {
....@@ -143,26 +128,6 @@
143128 return (void *) (space->mmio_base | offset);
144129 }
145130
146
-#define __ia64_inb ___ia64_inb
147
-#define __ia64_inw ___ia64_inw
148
-#define __ia64_inl ___ia64_inl
149
-#define __ia64_outb ___ia64_outb
150
-#define __ia64_outw ___ia64_outw
151
-#define __ia64_outl ___ia64_outl
152
-#define __ia64_readb ___ia64_readb
153
-#define __ia64_readw ___ia64_readw
154
-#define __ia64_readl ___ia64_readl
155
-#define __ia64_readq ___ia64_readq
156
-#define __ia64_readb_relaxed ___ia64_readb
157
-#define __ia64_readw_relaxed ___ia64_readw
158
-#define __ia64_readl_relaxed ___ia64_readl
159
-#define __ia64_readq_relaxed ___ia64_readq
160
-#define __ia64_writeb ___ia64_writeb
161
-#define __ia64_writew ___ia64_writew
162
-#define __ia64_writel ___ia64_writel
163
-#define __ia64_writeq ___ia64_writeq
164
-#define __ia64_mmiowb ___ia64_mmiowb
165
-
166131 /*
167132 * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure
168133 * that the access has completed before executing other I/O accesses. Since we're doing
....@@ -171,8 +136,8 @@
171136 * during optimization, which is why we use "volatile" pointers.
172137 */
173138
174
-static inline unsigned int
175
-___ia64_inb (unsigned long port)
139
+#define inb inb
140
+static inline unsigned int inb(unsigned long port)
176141 {
177142 volatile unsigned char *addr = __ia64_mk_io_addr(port);
178143 unsigned char ret;
....@@ -182,8 +147,8 @@
182147 return ret;
183148 }
184149
185
-static inline unsigned int
186
-___ia64_inw (unsigned long port)
150
+#define inw inw
151
+static inline unsigned int inw(unsigned long port)
187152 {
188153 volatile unsigned short *addr = __ia64_mk_io_addr(port);
189154 unsigned short ret;
....@@ -193,8 +158,8 @@
193158 return ret;
194159 }
195160
196
-static inline unsigned int
197
-___ia64_inl (unsigned long port)
161
+#define inl inl
162
+static inline unsigned int inl(unsigned long port)
198163 {
199164 volatile unsigned int *addr = __ia64_mk_io_addr(port);
200165 unsigned int ret;
....@@ -204,8 +169,8 @@
204169 return ret;
205170 }
206171
207
-static inline void
208
-___ia64_outb (unsigned char val, unsigned long port)
172
+#define outb outb
173
+static inline void outb(unsigned char val, unsigned long port)
209174 {
210175 volatile unsigned char *addr = __ia64_mk_io_addr(port);
211176
....@@ -213,8 +178,8 @@
213178 __ia64_mf_a();
214179 }
215180
216
-static inline void
217
-___ia64_outw (unsigned short val, unsigned long port)
181
+#define outw outw
182
+static inline void outw(unsigned short val, unsigned long port)
218183 {
219184 volatile unsigned short *addr = __ia64_mk_io_addr(port);
220185
....@@ -222,8 +187,8 @@
222187 __ia64_mf_a();
223188 }
224189
225
-static inline void
226
-___ia64_outl (unsigned int val, unsigned long port)
190
+#define outl outl
191
+static inline void outl(unsigned int val, unsigned long port)
227192 {
228193 volatile unsigned int *addr = __ia64_mk_io_addr(port);
229194
....@@ -231,214 +196,75 @@
231196 __ia64_mf_a();
232197 }
233198
234
-static inline void
235
-__insb (unsigned long port, void *dst, unsigned long count)
199
+#define insb insb
200
+static inline void insb(unsigned long port, void *dst, unsigned long count)
236201 {
237202 unsigned char *dp = dst;
238203
239204 while (count--)
240
- *dp++ = platform_inb(port);
205
+ *dp++ = inb(port);
241206 }
242207
243
-static inline void
244
-__insw (unsigned long port, void *dst, unsigned long count)
208
+#define insw insw
209
+static inline void insw(unsigned long port, void *dst, unsigned long count)
245210 {
246211 unsigned short *dp = dst;
247212
248213 while (count--)
249
- put_unaligned(platform_inw(port), dp++);
214
+ put_unaligned(inw(port), dp++);
250215 }
251216
252
-static inline void
253
-__insl (unsigned long port, void *dst, unsigned long count)
217
+#define insl insl
218
+static inline void insl(unsigned long port, void *dst, unsigned long count)
254219 {
255220 unsigned int *dp = dst;
256221
257222 while (count--)
258
- put_unaligned(platform_inl(port), dp++);
223
+ put_unaligned(inl(port), dp++);
259224 }
260225
261
-static inline void
262
-__outsb (unsigned long port, const void *src, unsigned long count)
226
+#define outsb outsb
227
+static inline void outsb(unsigned long port, const void *src,
228
+ unsigned long count)
263229 {
264230 const unsigned char *sp = src;
265231
266232 while (count--)
267
- platform_outb(*sp++, port);
233
+ outb(*sp++, port);
268234 }
269235
270
-static inline void
271
-__outsw (unsigned long port, const void *src, unsigned long count)
236
+#define outsw outsw
237
+static inline void outsw(unsigned long port, const void *src,
238
+ unsigned long count)
272239 {
273240 const unsigned short *sp = src;
274241
275242 while (count--)
276
- platform_outw(get_unaligned(sp++), port);
243
+ outw(get_unaligned(sp++), port);
277244 }
278245
279
-static inline void
280
-__outsl (unsigned long port, const void *src, unsigned long count)
246
+#define outsl outsl
247
+static inline void outsl(unsigned long port, const void *src,
248
+ unsigned long count)
281249 {
282250 const unsigned int *sp = src;
283251
284252 while (count--)
285
- platform_outl(get_unaligned(sp++), port);
253
+ outl(get_unaligned(sp++), port);
286254 }
287
-
288
-/*
289
- * Unfortunately, some platforms are broken and do not follow the IA-64 architecture
290
- * specification regarding legacy I/O support. Thus, we have to make these operations
291
- * platform dependent...
292
- */
293
-#define __inb platform_inb
294
-#define __inw platform_inw
295
-#define __inl platform_inl
296
-#define __outb platform_outb
297
-#define __outw platform_outw
298
-#define __outl platform_outl
299
-#define __mmiowb platform_mmiowb
300
-
301
-#define inb(p) __inb(p)
302
-#define inw(p) __inw(p)
303
-#define inl(p) __inl(p)
304
-#define insb(p,d,c) __insb(p,d,c)
305
-#define insw(p,d,c) __insw(p,d,c)
306
-#define insl(p,d,c) __insl(p,d,c)
307
-#define outb(v,p) __outb(v,p)
308
-#define outw(v,p) __outw(v,p)
309
-#define outl(v,p) __outl(v,p)
310
-#define outsb(p,s,c) __outsb(p,s,c)
311
-#define outsw(p,s,c) __outsw(p,s,c)
312
-#define outsl(p,s,c) __outsl(p,s,c)
313
-#define mmiowb() __mmiowb()
314
-
315
-/*
316
- * The address passed to these functions are ioremap()ped already.
317
- *
318
- * We need these to be machine vectors since some platforms don't provide
319
- * DMA coherence via PIO reads (PCI drivers and the spec imply that this is
320
- * a good idea). Writes are ok though for all existing ia64 platforms (and
321
- * hopefully it'll stay that way).
322
- */
323
-static inline unsigned char
324
-___ia64_readb (const volatile void __iomem *addr)
325
-{
326
- return *(volatile unsigned char __force *)addr;
327
-}
328
-
329
-static inline unsigned short
330
-___ia64_readw (const volatile void __iomem *addr)
331
-{
332
- return *(volatile unsigned short __force *)addr;
333
-}
334
-
335
-static inline unsigned int
336
-___ia64_readl (const volatile void __iomem *addr)
337
-{
338
- return *(volatile unsigned int __force *) addr;
339
-}
340
-
341
-static inline unsigned long
342
-___ia64_readq (const volatile void __iomem *addr)
343
-{
344
- return *(volatile unsigned long __force *) addr;
345
-}
346
-
347
-static inline void
348
-__writeb (unsigned char val, volatile void __iomem *addr)
349
-{
350
- *(volatile unsigned char __force *) addr = val;
351
-}
352
-
353
-static inline void
354
-__writew (unsigned short val, volatile void __iomem *addr)
355
-{
356
- *(volatile unsigned short __force *) addr = val;
357
-}
358
-
359
-static inline void
360
-__writel (unsigned int val, volatile void __iomem *addr)
361
-{
362
- *(volatile unsigned int __force *) addr = val;
363
-}
364
-
365
-static inline void
366
-__writeq (unsigned long val, volatile void __iomem *addr)
367
-{
368
- *(volatile unsigned long __force *) addr = val;
369
-}
370
-
371
-#define __readb platform_readb
372
-#define __readw platform_readw
373
-#define __readl platform_readl
374
-#define __readq platform_readq
375
-#define __readb_relaxed platform_readb_relaxed
376
-#define __readw_relaxed platform_readw_relaxed
377
-#define __readl_relaxed platform_readl_relaxed
378
-#define __readq_relaxed platform_readq_relaxed
379
-
380
-#define readb(a) __readb((a))
381
-#define readw(a) __readw((a))
382
-#define readl(a) __readl((a))
383
-#define readq(a) __readq((a))
384
-#define readb_relaxed(a) __readb_relaxed((a))
385
-#define readw_relaxed(a) __readw_relaxed((a))
386
-#define readl_relaxed(a) __readl_relaxed((a))
387
-#define readq_relaxed(a) __readq_relaxed((a))
388
-#define __raw_readb readb
389
-#define __raw_readw readw
390
-#define __raw_readl readl
391
-#define __raw_readq readq
392
-#define __raw_readb_relaxed readb_relaxed
393
-#define __raw_readw_relaxed readw_relaxed
394
-#define __raw_readl_relaxed readl_relaxed
395
-#define __raw_readq_relaxed readq_relaxed
396
-#define writeb(v,a) __writeb((v), (a))
397
-#define writew(v,a) __writew((v), (a))
398
-#define writel(v,a) __writel((v), (a))
399
-#define writeq(v,a) __writeq((v), (a))
400
-#define writeb_relaxed(v,a) __writeb((v), (a))
401
-#define writew_relaxed(v,a) __writew((v), (a))
402
-#define writel_relaxed(v,a) __writel((v), (a))
403
-#define writeq_relaxed(v,a) __writeq((v), (a))
404
-#define __raw_writeb writeb
405
-#define __raw_writew writew
406
-#define __raw_writel writel
407
-#define __raw_writeq writeq
408
-
409
-#ifndef inb_p
410
-# define inb_p inb
411
-#endif
412
-#ifndef inw_p
413
-# define inw_p inw
414
-#endif
415
-#ifndef inl_p
416
-# define inl_p inl
417
-#endif
418
-
419
-#ifndef outb_p
420
-# define outb_p outb
421
-#endif
422
-#ifndef outw_p
423
-# define outw_p outw
424
-#endif
425
-#ifndef outl_p
426
-# define outl_p outl
427
-#endif
428255
429256 # ifdef __KERNEL__
430257
431258 extern void __iomem * ioremap(unsigned long offset, unsigned long size);
432
-extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
259
+extern void __iomem * ioremap_uc(unsigned long offset, unsigned long size);
433260 extern void iounmap (volatile void __iomem *addr);
434261 static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size)
435262 {
436263 return ioremap(phys_addr, size);
437264 }
438265 #define ioremap ioremap
439
-#define ioremap_nocache ioremap_nocache
440266 #define ioremap_cache ioremap_cache
441
-#define ioremap_uc ioremap_nocache
267
+#define ioremap_uc ioremap_uc
442268 #define iounmap iounmap
443269
444270 /*