~hc/RK356X_SDK_RELEASE.git

..	..	@@ -529,6 +529,8 @@
529	529	<1 RK_PD2 2 &pcfg_pull_none>,
530	530	/* flash_rdy */
531	531	<1 RK_PD1 2 &pcfg_pull_none>,
	532	+ /* flash_volsel */
	533	+ <0 RK_PA7 1 &pcfg_pull_none>,
532	534	/* flash_wpn */
533	535	<1 RK_PC7 3 &pcfg_pull_none>,
534	536	/* flash_wrn */
..	..	@@ -915,35 +917,35 @@
915	917	i2s1m0_lrckrx: i2s1m0-lrckrx {
916	918	rockchip,pins =
917	919	/* i2s1m0_lrckrx */
918		- <1 RK_PA6 1 &pcfg_pull_none>;
	920	+ <1 RK_PA6 1 &pcfg_pull_none_smt>;
919	921	};
920	922
921	923	/omit-if-no-ref/
922	924	i2s1m0_lrcktx: i2s1m0-lrcktx {
923	925	rockchip,pins =
924	926	/* i2s1m0_lrcktx */
925		- <1 RK_PA5 1 &pcfg_pull_none>;
	927	+ <1 RK_PA5 1 &pcfg_pull_none_smt>;
926	928	};
927	929
928	930	/omit-if-no-ref/
929	931	i2s1m0_mclk: i2s1m0-mclk {
930	932	rockchip,pins =
931	933	/* i2s1m0_mclk */
932		- <1 RK_PA2 1 &pcfg_pull_none>;
	934	+ <1 RK_PA2 1 &pcfg_pull_none_smt>;
933	935	};
934	936
935	937	/omit-if-no-ref/
936	938	i2s1m0_sclkrx: i2s1m0-sclkrx {
937	939	rockchip,pins =
938	940	/* i2s1m0_sclkrx */
939		- <1 RK_PA4 1 &pcfg_pull_none>;
	941	+ <1 RK_PA4 1 &pcfg_pull_none_smt>;
940	942	};
941	943
942	944	/omit-if-no-ref/
943	945	i2s1m0_sclktx: i2s1m0-sclktx {
944	946	rockchip,pins =
945	947	/* i2s1m0_sclktx */
946		- <1 RK_PA3 1 &pcfg_pull_none>;
	948	+ <1 RK_PA3 1 &pcfg_pull_none_smt>;
947	949	};
948	950
949	951	/omit-if-no-ref/
..	..	@@ -1006,35 +1008,35 @@
1006	1008	i2s1m1_lrckrx: i2s1m1-lrckrx {
1007	1009	rockchip,pins =
1008	1010	/* i2s1m1_lrckrx */
1009		- <4 RK_PA7 5 &pcfg_pull_none>;
	1011	+ <4 RK_PA7 5 &pcfg_pull_none_smt>;
1010	1012	};
1011	1013
1012	1014	/omit-if-no-ref/
1013	1015	i2s1m1_lrcktx: i2s1m1-lrcktx {
1014	1016	rockchip,pins =
1015	1017	/* i2s1m1_lrcktx */
1016		- <3 RK_PD0 4 &pcfg_pull_none>;
	1018	+ <3 RK_PD0 4 &pcfg_pull_none_smt>;
1017	1019	};
1018	1020
1019	1021	/omit-if-no-ref/
1020	1022	i2s1m1_mclk: i2s1m1-mclk {
1021	1023	rockchip,pins =
1022	1024	/* i2s1m1_mclk */
1023		- <3 RK_PC6 4 &pcfg_pull_none>;
	1025	+ <3 RK_PC6 4 &pcfg_pull_none_smt>;
1024	1026	};
1025	1027
1026	1028	/omit-if-no-ref/
1027	1029	i2s1m1_sclkrx: i2s1m1-sclkrx {
1028	1030	rockchip,pins =
1029	1031	/* i2s1m1_sclkrx */
1030		- <4 RK_PA6 5 &pcfg_pull_none>;
	1032	+ <4 RK_PA6 5 &pcfg_pull_none_smt>;
1031	1033	};
1032	1034
1033	1035	/omit-if-no-ref/
1034	1036	i2s1m1_sclktx: i2s1m1-sclktx {
1035	1037	rockchip,pins =
1036	1038	/* i2s1m1_sclktx */
1037		- <3 RK_PC7 4 &pcfg_pull_none>;
	1039	+ <3 RK_PC7 4 &pcfg_pull_none_smt>;
1038	1040	};
1039	1041
1040	1042	/omit-if-no-ref/
..	..	@@ -1097,35 +1099,35 @@
1097	1099	i2s1m2_lrckrx: i2s1m2-lrckrx {
1098	1100	rockchip,pins =
1099	1101	/* i2s1m2_lrckrx */
1100		- <3 RK_PC5 5 &pcfg_pull_none>;
	1102	+ <3 RK_PC5 5 &pcfg_pull_none_smt>;
1101	1103	};
1102	1104
1103	1105	/omit-if-no-ref/
1104	1106	i2s1m2_lrcktx: i2s1m2-lrcktx {
1105	1107	rockchip,pins =
1106	1108	/* i2s1m2_lrcktx */
1107		- <2 RK_PD2 5 &pcfg_pull_none>;
	1109	+ <2 RK_PD2 5 &pcfg_pull_none_smt>;
1108	1110	};
1109	1111
1110	1112	/omit-if-no-ref/
1111	1113	i2s1m2_mclk: i2s1m2-mclk {
1112	1114	rockchip,pins =
1113	1115	/* i2s1m2_mclk */
1114		- <2 RK_PD0 5 &pcfg_pull_none>;
	1116	+ <2 RK_PD0 5 &pcfg_pull_none_smt>;
1115	1117	};
1116	1118
1117	1119	/omit-if-no-ref/
1118	1120	i2s1m2_sclkrx: i2s1m2-sclkrx {
1119	1121	rockchip,pins =
1120	1122	/* i2s1m2_sclkrx */
1121		- <3 RK_PC3 5 &pcfg_pull_none>;
	1123	+ <3 RK_PC3 5 &pcfg_pull_none_smt>;
1122	1124	};
1123	1125
1124	1126	/omit-if-no-ref/
1125	1127	i2s1m2_sclktx: i2s1m2-sclktx {
1126	1128	rockchip,pins =
1127	1129	/* i2s1m2_sclktx */
1128		- <2 RK_PD1 5 &pcfg_pull_none>;
	1130	+ <2 RK_PD1 5 &pcfg_pull_none_smt>;
1129	1131	};
1130	1132
1131	1133	/omit-if-no-ref/
..	..	@@ -1190,35 +1192,35 @@
1190	1192	i2s2m0_lrckrx: i2s2m0-lrckrx {
1191	1193	rockchip,pins =
1192	1194	/* i2s2m0_lrckrx */
1193		- <2 RK_PC0 1 &pcfg_pull_none>;
	1195	+ <2 RK_PC0 1 &pcfg_pull_none_smt>;
1194	1196	};
1195	1197
1196	1198	/omit-if-no-ref/
1197	1199	i2s2m0_lrcktx: i2s2m0-lrcktx {
1198	1200	rockchip,pins =
1199	1201	/* i2s2m0_lrcktx */
1200		- <2 RK_PC3 1 &pcfg_pull_none>;
	1202	+ <2 RK_PC3 1 &pcfg_pull_none_smt>;
1201	1203	};
1202	1204
1203	1205	/omit-if-no-ref/
1204	1206	i2s2m0_mclk: i2s2m0-mclk {
1205	1207	rockchip,pins =
1206	1208	/* i2s2m0_mclk */
1207		- <2 RK_PC1 1 &pcfg_pull_none>;
	1209	+ <2 RK_PC1 1 &pcfg_pull_none_smt>;
1208	1210	};
1209	1211
1210	1212	/omit-if-no-ref/
1211	1213	i2s2m0_sclkrx: i2s2m0-sclkrx {
1212	1214	rockchip,pins =
1213	1215	/* i2s2m0_sclkrx */
1214		- <2 RK_PB7 1 &pcfg_pull_none>;
	1216	+ <2 RK_PB7 1 &pcfg_pull_none_smt>;
1215	1217	};
1216	1218
1217	1219	/omit-if-no-ref/
1218	1220	i2s2m0_sclktx: i2s2m0-sclktx {
1219	1221	rockchip,pins =
1220	1222	/* i2s2m0_sclktx */
1221		- <2 RK_PC2 1 &pcfg_pull_none>;
	1223	+ <2 RK_PC2 1 &pcfg_pull_none_smt>;
1222	1224	};
1223	1225
1224	1226	/omit-if-no-ref/
..	..	@@ -1239,35 +1241,35 @@
1239	1241	i2s2m1_lrckrx: i2s2m1-lrckrx {
1240	1242	rockchip,pins =
1241	1243	/* i2s2m1_lrckrx */
1242		- <4 RK_PA5 5 &pcfg_pull_none>;
	1244	+ <4 RK_PA5 5 &pcfg_pull_none_smt>;
1243	1245	};
1244	1246
1245	1247	/omit-if-no-ref/
1246	1248	i2s2m1_lrcktx: i2s2m1-lrcktx {
1247	1249	rockchip,pins =
1248	1250	/* i2s2m1_lrcktx */
1249		- <4 RK_PA4 5 &pcfg_pull_none>;
	1251	+ <4 RK_PA4 5 &pcfg_pull_none_smt>;
1250	1252	};
1251	1253
1252	1254	/omit-if-no-ref/
1253	1255	i2s2m1_mclk: i2s2m1-mclk {
1254	1256	rockchip,pins =
1255	1257	/* i2s2m1_mclk */
1256		- <4 RK_PB6 5 &pcfg_pull_none>;
	1258	+ <4 RK_PB6 5 &pcfg_pull_none_smt>;
1257	1259	};
1258	1260
1259	1261	/omit-if-no-ref/
1260	1262	i2s2m1_sclkrx: i2s2m1-sclkrx {
1261	1263	rockchip,pins =
1262	1264	/* i2s2m1_sclkrx */
1263		- <4 RK_PC1 5 &pcfg_pull_none>;
	1265	+ <4 RK_PC1 5 &pcfg_pull_none_smt>;
1264	1266	};
1265	1267
1266	1268	/omit-if-no-ref/
1267	1269	i2s2m1_sclktx: i2s2m1-sclktx {
1268	1270	rockchip,pins =
1269	1271	/* i2s2m1_sclktx */
1270		- <4 RK_PB7 4 &pcfg_pull_none>;
	1272	+ <4 RK_PB7 4 &pcfg_pull_none_smt>;
1271	1273	};
1272	1274
1273	1275	/omit-if-no-ref/
..	..	@@ -1290,22 +1292,22 @@
1290	1292	i2s3m0_lrck: i2s3m0-lrck {
1291	1293	rockchip,pins =
1292	1294	/* i2s3m0_lrck */
1293		- <3 RK_PA4 4 &pcfg_pull_none>;
	1295	+ <3 RK_PA4 4 &pcfg_pull_none_smt>;
1294	1296	};
1295	1297
1296	1298	/omit-if-no-ref/
1297	1299	i2s3m0_mclk: i2s3m0-mclk {
1298	1300	rockchip,pins =
1299	1301	/* i2s3m0_mclk */
1300		- <3 RK_PA2 4 &pcfg_pull_none>;
	1302	+ <3 RK_PA2 4 &pcfg_pull_none_smt>;
1301	1303	};
1302	1304
1303	1305	/omit-if-no-ref/
1304		- i2s3m0_sclk: i2s3m0-sclk {
1305		- rockchip,pins =
	1306	+ //i2s3m0_sclk: i2s3m0-sclk {
	1307	+ // rockchip,pins =
1306	1308	/* i2s3m0_sclk */
1307		- <3 RK_PA3 4 &pcfg_pull_none>;
1308		- };
	1309	+ // <3 RK_PA3 4 &pcfg_pull_none_smt>;
	1310	+ //};
1309	1311
1310	1312	/omit-if-no-ref/
1311	1313	i2s3m0_sdi: i2s3m0-sdi {
..	..	@@ -1325,21 +1327,21 @@
1325	1327	i2s3m1_lrck: i2s3m1-lrck {
1326	1328	rockchip,pins =
1327	1329	/* i2s3m1_lrck */
1328		- <4 RK_PC4 5 &pcfg_pull_none>;
	1330	+ <4 RK_PC4 5 &pcfg_pull_none_smt>;
1329	1331	};
1330	1332
1331	1333	/omit-if-no-ref/
1332	1334	i2s3m1_mclk: i2s3m1-mclk {
1333	1335	rockchip,pins =
1334	1336	/* i2s3m1_mclk */
1335		- <4 RK_PC2 5 &pcfg_pull_none>;
	1337	+ <4 RK_PC2 5 &pcfg_pull_none_smt>;
1336	1338	};
1337	1339
1338	1340	/omit-if-no-ref/
1339	1341	i2s3m1_sclk: i2s3m1-sclk {
1340	1342	rockchip,pins =
1341	1343	/* i2s3m1_sclk */
1342		- <4 RK_PC3 5 &pcfg_pull_none>;
	1344	+ <4 RK_PC3 5 &pcfg_pull_none_smt>;
1343	1345	};
1344	1346
1345	1347	/omit-if-no-ref/