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2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6

 kernel/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
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@@ -194,19 +194,24 @@
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 	backlight: backlight {
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 		compatible = "pwm-backlight";
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-		brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
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-				     17 18 19 20 21 22 23 24 25 26 27 28 29 30
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-				     31 32 33 34 35 36 37 38 39 40 41 42 43 44
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-				     45 46 47 48 49 50 51 52 53 54 55 56 57 58
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-				     59 60 61 62 63 64 65 66 67 68 69 70 71 72
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-				     73 74 75 76 77 78 79 80 81 82 83 84 85 86
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-				     87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
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-		default-brightness-level = <51>;
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 		enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
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 		power-supply = <&pp3300_disp>;
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 		pinctrl-names = "default";
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 		pinctrl-0 = <&bl_en>;
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 		pwm-delay-us = <10000>;
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+	};
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+
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+	gpio_keys: gpio-keys {
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+		compatible = "gpio-keys";
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&bt_host_wake_l>;
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+
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+		wake_on_bt: wake-on-bt {
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+			label = "Wake-on-Bluetooth";
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+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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+			linux,code = <KEY_WAKEUP>;
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+			wakeup-source;
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+		};
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 	};
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 };
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@@ -231,6 +236,14 @@
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 &edp {
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 	status = "okay";
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+
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+	/*
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+	 * eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only
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+	 * set this here, because rk3399-gru.dtsi ensures we can generate this
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+	 * off GPLL=600MHz, whereas some other RK3399 boards may not.
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+	 */
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+	assigned-clocks = <&cru PCLK_EDP>;
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+	assigned-clock-rates = <24000000>;
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 	ports {
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 		edp_out: port@1 {
..
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@@ -286,11 +299,9 @@
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 		#pwm-cells = <1>;
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 	};
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-	usbc_extcon1: extcon@1 {
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+	usbc_extcon1: extcon1 {
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 		compatible = "google,extcon-usbc-cros-ec";
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 		google,usb-port-id = <1>;
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-
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-		#extcon-cells = <0>;
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 	};
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 };
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..
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@@ -392,6 +403,7 @@
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 	};
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 	wlan_host_wake_l: wlan-host-wake-l {
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+		/* Kevin has an external pull up, but Bob does not */
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 		rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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 	};
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 };