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2024-05-10 10ebd8556b7990499c896a550e3d416b444211e6

 kernel/arch/arm/mm/copypage-v4mc.c
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@@ -1,11 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  *  linux/arch/arm/lib/copypage-armv4mc.S
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  *
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  *  Copyright (C) 1995-2005 Russell King
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  *
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  * This handles the mini data cache, as found on SA11x0 and XScale
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  * processors.  When we copy a user page page, we map it in such a way
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@@ -17,7 +14,6 @@
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 #include <linux/mm.h>
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 #include <linux/highmem.h>
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-#include <asm/pgtable.h>
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 #include <asm/tlbflush.h>
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 #include <asm/cacheflush.h>
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@@ -45,6 +41,7 @@
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 	int tmp;
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 	asm volatile ("\
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+	.syntax unified\n\
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 	ldmia	%0!, {r2, r3, ip, lr}		@ 4\n\
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 1:	mcr	p15, 0, %1, c7, c6, 1		@ 1   invalidate D line\n\
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 	stmia	%1!, {r2, r3, ip, lr}		@ 4\n\
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@@ -56,7 +53,7 @@
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 	ldmia	%0!, {r2, r3, ip, lr}		@ 4\n\
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 	subs	%2, %2, #1			@ 1\n\
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 	stmia	%1!, {r2, r3, ip, lr}		@ 4\n\
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-	ldmneia	%0!, {r2, r3, ip, lr}		@ 4\n\
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+	ldmiane	%0!, {r2, r3, ip, lr}		@ 4\n\
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 	bne	1b				@ "
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 	: "+&r" (from), "+&r" (to), "=&r" (tmp)
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 	: "2" (PAGE_SIZE / 64)