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2024-02-20 102a0743326a03cd1a1202ceda21e175b7d3575c

 kernel/tools/arch/sh/include/asm/barrier.h
.. .. @@ -22,7 +22,7 @@
22 22   * Historically we have only done this type of barrier for the MMUCR, but
23 23   * it's also necessary for the CCR, so we make it generic here instead.
24 24   */
25 -#if defined(__SH4A__) || defined(__SH5__)
25 +#if defined(__SH4A__)
26 26  #define mb()		__asm__ __volatile__ ("synco": : :"memory")
27 27  #define rmb()		mb()
28 28  #define wmb()		mb()

..	..	@@ -22,7 +22,7 @@
22	22	* Historically we have only done this type of barrier for the MMUCR, but
23	23	* it's also necessary for the CCR, so we make it generic here instead.
24	24	*/
25		-#if defined(__SH4A__) \|\| defined(__SH5__)
	25	+#if defined(__SH4A__)
26	26	#define mb() __asm__ __volatile__ ("synco": : :"memory")
27	27	#define rmb() mb()
28	28	#define wmb() mb()