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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License version 2 and |
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6 | | - * only version 2 as published by the Free Software Foundation. |
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7 | | - * |
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8 | | - * This program is distributed in the hope that it will be useful, |
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9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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11 | | - * GNU General Public License for more details. |
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12 | 4 | * |
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13 | 5 | * lpass-ipq806x.c -- ALSA SoC CPU DAI driver for QTi LPASS |
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14 | 6 | * Splited out the IPQ8064 soc specific from lpass-cpu.c |
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.. | .. |
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63 | 55 | .ops = &asoc_qcom_lpass_cpu_dai_ops, |
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64 | 56 | }; |
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65 | 57 | |
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66 | | -static int ipq806x_lpass_alloc_dma_channel(struct lpass_data *drvdata, int dir) |
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| 58 | +static int ipq806x_lpass_init(struct platform_device *pdev) |
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| 59 | +{ |
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| 60 | + struct lpass_data *drvdata = platform_get_drvdata(pdev); |
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| 61 | + struct device *dev = &pdev->dev; |
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| 62 | + int ret; |
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| 63 | + |
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| 64 | + drvdata->ahbix_clk = devm_clk_get(dev, "ahbix-clk"); |
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| 65 | + if (IS_ERR(drvdata->ahbix_clk)) { |
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| 66 | + dev_err(dev, "error getting ahbix-clk: %ld\n", |
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| 67 | + PTR_ERR(drvdata->ahbix_clk)); |
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| 68 | + ret = PTR_ERR(drvdata->ahbix_clk); |
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| 69 | + goto err_ahbix_clk; |
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| 70 | + } |
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| 71 | + |
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| 72 | + ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY); |
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| 73 | + if (ret) { |
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| 74 | + dev_err(dev, "error setting rate on ahbix_clk: %d\n", ret); |
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| 75 | + goto err_ahbix_clk; |
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| 76 | + } |
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| 77 | + dev_dbg(dev, "set ahbix_clk rate to %lu\n", |
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| 78 | + clk_get_rate(drvdata->ahbix_clk)); |
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| 79 | + |
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| 80 | + ret = clk_prepare_enable(drvdata->ahbix_clk); |
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| 81 | + if (ret) { |
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| 82 | + dev_err(dev, "error enabling ahbix_clk: %d\n", ret); |
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| 83 | + goto err_ahbix_clk; |
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| 84 | + } |
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| 85 | + |
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| 86 | +err_ahbix_clk: |
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| 87 | + return ret; |
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| 88 | +} |
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| 89 | + |
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| 90 | +static int ipq806x_lpass_exit(struct platform_device *pdev) |
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| 91 | +{ |
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| 92 | + struct lpass_data *drvdata = platform_get_drvdata(pdev); |
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| 93 | + |
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| 94 | + clk_disable_unprepare(drvdata->ahbix_clk); |
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| 95 | + |
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| 96 | + return 0; |
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| 97 | +} |
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| 98 | + |
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| 99 | +static int ipq806x_lpass_alloc_dma_channel(struct lpass_data *drvdata, int dir, unsigned int dai_id) |
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67 | 100 | { |
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68 | 101 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) |
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69 | 102 | return IPQ806X_LPAIF_RDMA_CHAN_MI2S; |
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.. | .. |
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71 | 104 | return -EINVAL; |
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72 | 105 | } |
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73 | 106 | |
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74 | | -static int ipq806x_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) |
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| 107 | +static int ipq806x_lpass_free_dma_channel(struct lpass_data *drvdata, int chan, unsigned int dai_id) |
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75 | 108 | { |
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76 | 109 | return 0; |
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77 | 110 | } |
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.. | .. |
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90 | 123 | .wrdma_reg_stride = 0x1000, |
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91 | 124 | .wrdma_channel_start = 5, |
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92 | 125 | .wrdma_channels = 4, |
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| 126 | + .loopback = REG_FIELD_ID(0x0010, 15, 15, 5, 0x4), |
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| 127 | + .spken = REG_FIELD_ID(0x0010, 14, 14, 5, 0x4), |
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| 128 | + .spkmode = REG_FIELD_ID(0x0010, 10, 13, 5, 0x4), |
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| 129 | + .spkmono = REG_FIELD_ID(0x0010, 9, 9, 5, 0x4), |
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| 130 | + .micen = REG_FIELD_ID(0x0010, 8, 8, 5, 0x4), |
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| 131 | + .micmode = REG_FIELD_ID(0x0010, 4, 7, 5, 0x4), |
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| 132 | + .micmono = REG_FIELD_ID(0x0010, 3, 3, 5, 0x4), |
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| 133 | + .wssrc = REG_FIELD_ID(0x0010, 2, 2, 5, 0x4), |
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| 134 | + .bitwidth = REG_FIELD_ID(0x0010, 0, 1, 5, 0x4), |
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| 135 | + |
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| 136 | + .rdma_dyncclk = REG_FIELD_ID(0x6000, 12, 12, 4, 0x1000), |
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| 137 | + .rdma_bursten = REG_FIELD_ID(0x6000, 11, 11, 4, 0x1000), |
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| 138 | + .rdma_wpscnt = REG_FIELD_ID(0x6000, 8, 10, 4, 0x1000), |
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| 139 | + .rdma_intf = REG_FIELD_ID(0x6000, 4, 7, 4, 0x1000), |
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| 140 | + .rdma_fifowm = REG_FIELD_ID(0x6000, 1, 3, 4, 0x1000), |
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| 141 | + .rdma_enable = REG_FIELD_ID(0x6000, 0, 0, 4, 0x1000), |
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| 142 | + |
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| 143 | + .wrdma_dyncclk = REG_FIELD_ID(0xB000, 12, 12, 4, 0x1000), |
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| 144 | + .wrdma_bursten = REG_FIELD_ID(0xB000, 11, 11, 4, 0x1000), |
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| 145 | + .wrdma_wpscnt = REG_FIELD_ID(0xB000, 8, 10, 4, 0x1000), |
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| 146 | + .wrdma_intf = REG_FIELD_ID(0xB000, 4, 7, 4, 0x1000), |
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| 147 | + .wrdma_fifowm = REG_FIELD_ID(0xB000, 1, 3, 4, 0x1000), |
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| 148 | + .wrdma_enable = REG_FIELD_ID(0xB000, 0, 0, 4, 0x1000), |
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| 149 | + |
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93 | 150 | .dai_driver = &ipq806x_lpass_cpu_dai_driver, |
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94 | 151 | .num_dai = 1, |
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95 | 152 | .dai_osr_clk_names = (const char *[]) { |
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.. | .. |
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98 | 155 | .dai_bit_clk_names = (const char *[]) { |
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99 | 156 | "mi2s-bit-clk", |
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100 | 157 | }, |
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| 158 | + .init = ipq806x_lpass_init, |
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| 159 | + .exit = ipq806x_lpass_exit, |
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101 | 160 | .alloc_dma_channel = ipq806x_lpass_alloc_dma_channel, |
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102 | 161 | .free_dma_channel = ipq806x_lpass_free_dma_channel, |
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103 | 162 | }; |
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